參數(shù)資料
型號： SAA7118E
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Multistandard video decoder with adaptive comb filter and component video input
中文描述： COLOR SIGNAL DECODER, PBGA156
封裝： 15 X 15 MM, 1.05 MM HEIGHT, PLASTIC, MO-192, SOT-700-1, BGA-156
文件頁數(shù)： 77/169頁
文件大?。?/td> 665K
代理商： SAA7118E
2001 May 30
77
Philips Semiconductors
Preliminary specification
Multistandard video decoder with adaptive
comb filter and component video input
SAA7118
9.7
Host port for 16-bit extension of video data I/O (H-port)
The H-port pins HPD can be used for extension of the data I/O paths to 16-bit.
The I-port has functional priority. If I8_16[93H[6]] is set to logic 1 the output drivers of the H-port are enabled depending
on the I-port enable control. For I8_16 = 0, the HPD output is disabled.
Table 33
Signals dedicated to the host port
Note
1.
Pin numbers for QFP160 in parenthesis.
SYMBOL
PIN
(1)
I/O
DESCRIPTION
BIT
HPD7 to HPD0
G13, F14, F13, E14, E12,
E13, E11 and D14 (103,
105, 107 and 109 to 113)
I/O
16-bit extension for digital I/O
(chrominance component)
IPE[1:0] 87H[1:0], ITRI[8FH[6]]
and I8_16[93H[6]]
9.8
Basic input and output timing diagrams I-port
and X-port
9.8.1
I-
PORT OUTPUT TIMING
The following diagrams illustrate the output timing via the
I-port. IGPH and IGPV are logic 1 active gate signals. If
reference pulses are programmed, these pulses are
generated on the rising edge of the logic 1 active gates.
Valid data is accompanied by the output data qualifier on
pin IDQ. In addition invalid cycles are marked with output
code 00H.
The IDQ output pin may be defined to be a gated clock
output signal (ICLK AND internal IDQ).
9.8.2
X-
PORT INPUT TIMING
At the X-port the input timing requirements are the same
as those for the I-port output. But different to those below:
It is not necessary to mark invalid cycles with a 00H
code
No constraints on the input qualifier (can be a random
pattern)
XCLK may be a gated clock (XCLK AND external XDQ).
Remark
: All timings illustrated in Figs 38 to 44 are given
for an uninterrupted output stream (no handshake with the
external hardware).
Fig.38 Output timing I-port for serial 8-bit data at start of a line (ICODE = 1).
IPD[7:0]
IGPH
IDQ
ICLK
00
FF
00
00
SAV
00
CB
Y
CR
Y
00
CB
Y
CR
Y
00
MHB550
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7118E/V1,518 功能描述:視頻 IC COMPONENT VID DECODER W/COMB F RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7118E/V1,551 功能描述:視頻 IC COMPONENT VID DECODER W/COMB F RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7118E/V1,557 功能描述:視頻 IC COMPONENT VID DECODER W/COMB F RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7118E/V1/M5 功能描述:視頻 IC COMPONENT + VIDEO PROCESSOR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7118E/V1/M5,518 功能描述:視頻 IC COMPONENT + VIDEO PROCESSOR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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