參數(shù)資料
型號: SAA7118E
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Multistandard video decoder with adaptive comb filter and component video input
中文描述: COLOR SIGNAL DECODER, PBGA156
封裝: 15 X 15 MM, 1.05 MM HEIGHT, PLASTIC, MO-192, SOT-700-1, BGA-156
文件頁數(shù): 149/169頁
文件大?。?/td> 665K
代理商: SAA7118E
2001 May 30
149
Philips Semiconductors
Preliminary specification
Multistandard video decoder with adaptive
comb filter and component video input
SAA7118
Table 112
X-port formats and configuration; register set A [91H[2:0]] and B [C1H[2:0]]
Notes
1.
2.
X = don’t care.
FSC2 and FSC1 only to be used, if X-port input source don’t provide chroma information for every input line. X-port
input stream must contain dummy chroma bytes.
Table 113
X-port input reference signal definitions; register set A [92H[7:4]] and B [C2H[7:4]]
X = don’t care.
Table 114
X-port input reference signal definitions; register set A [92H[3:0]] and B [C2H[3:0]]
X = don’t care.
SCALER INPUT FORMAT AND CONFIGURATION FORMAT
CONTROL
CONTROL BITS D2 TO D0
(1)
FSC2
(2)
FSC1
(2)
FSC0
Input is Y-C
B
-C
R
4 : 2 : 2 like sampling scheme
Input is Y-C
B
-C
R
4 : 1 : 1 like sampling scheme
Chroma is provided every line, default
Chroma is provided every 2nd line
Chroma is provided every 3rd line
Chroma is provided every 4th line
X
X
0
0
1
1
X
X
0
1
0
1
0
1
X
X
X
X
X-PORT INPUT REFERENCE SIGNAL DEFINITIONS
CONTROL BITS D7 TO D4
XFDV
XFDH
XDV1
XDV0
Rising edge of XRV input and decoder V123 is vertical reference
Falling edge of XRV input and decoder V123 is vertical reference
XRV is a V-sync or V-gate signal
XRV is a frame sync, V-pulses are generated internally on both edges of
FS input
X-port field ID is state of XRH at reference edge on XRV (defined by
XFDV)
Field ID (decoder and X-port field ID) is inverted
Reference edge for field detection is falling edge of XRV
Reference edge for field detection is rising edge of XRV
X
X
X
X
X
X
X
X
X
X
0
1
0
1
X
X
X
0
X
X
X
0
1
1
X
X
X
X
X
X
X
X
X-PORT INPUT REFERENCE SIGNAL DEFINITIONS
CONTROL BITS D3 TO D0
XCODE
XDH
XDQ
XCKS
XCLK input clock and XDQ input qualifier are needed
Data rate is defined by XCLK only, no XDQ signal used
Data are qualified at XDQ input at logic 1
Data are qualified at XDQ input at logic 0
Rising edge of XRH input is horizontal reference
Falling edge of XRH input is horizontal reference
Reference signals are taken from XRH and XRV
Reference signals are decoded from EAV and SAV
X
X
X
X
X
X
0
1
X
X
X
X
0
1
X
X
X
X
0
1
X
X
X
X
0
1
X
X
X
X
X
X
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SAA7118E/V1,557 功能描述:視頻 IC COMPONENT VID DECODER W/COMB F RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7118E/V1/M5 功能描述:視頻 IC COMPONENT + VIDEO PROCESSOR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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