- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄372113 > SAA7109A (NXP Semiconductors N.V.) HD-CODEC PDF資料下載
參數(shù)資料
| 型號(hào)： | SAA7109A |
| 廠(chǎng)商： | NXP Semiconductors N.V. |
| 元件分類(lèi)： | Codec |
| 英文描述： | HD-CODEC |
| 中文描述： | 高清解碼器 |
| 文件頁(yè)數(shù)： | 24/197頁(yè) |
| 文件大小： | 983K |
| 代理商： | SAA7109A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)
2004 Jun 29
24
Philips Semiconductors
Product specification
HD-CODEC
SAA7108AE; SAA7109AE
8.17
Pattern generator for HD sync pulses
The pattern generator provides an appropriate
synchronization pattern for the video data path in auxiliary
monitororHDTVmode,respectively.Itprovidesmaximum
flexibility in terms of raster generation for all interlaced and
non-interlaced computer graphics or ATSC formats. The
sync engine is capable of providing a combination of
event-value pairs which can be used to insert certain
values at specified times in the outgoing data stream. It
can also be used to generate digital signals associated
with time events. They can be used as digital horizontal
andverticalsynchronizationsignalsonpins HSM_CSYNC
and VSM.
The picture position is adjustable through the
programmable relationship between the sync pulses and
the video contents.
The generation of embedded analog sync pulses is bound
to a number of events which can be defined for a line.
Several of these line timing definitions can exist in parallel.
For the final sync raster composition a certain sequence of
lineswithdifferent synceventpropertieshastobedefined.
The sequence specifies a series of line types and the
number of occurrences of this specific line type. After the
sequence has been completed, it restarts from the
beginning. All pulse shapes are filtered internally in order
to avoid ringing after analog post filters.
The sequence of the generated pulse stream must fit
precisely to the incoming data stream in terms of the total
number of pixels per line and lines per frame.
The sync engines flexibility is achieved by using a
sequence of linked lists carrying the properties for the
image, the lines as well as fractions of lines. Figure 11
illustrates the context between the various tables.
The first table serves as an array to hold the correct
sequence of lines composing the synchronization raster. It
can contain up to 16 entries. Each entry holds a 4-bit index
to the next table and a 10-bit counter value which specifies
how often this particular line is invoked. If the necessary
line count for a particular line exceeds the 10 bits, it has to
use two table entries.
The 4-bit index in the line count array points to the line type
array. It holds up to 15 entries where, index 0 is not used,
index 1 points to the first entry, index 2 to the second entry
of the line type array etc.
Each entry of the line type array can hold up to 8 index
pointersto anothertable.Theseindices pointto portionsof
a line pulse pattern: A line could be split up e.g. into a sync,
a blank, and an active portion followed by another blank
portion, occupying four entries in one table line.
Each index of this table points to a particular line of the
next table in the linked list. This table is called the line
pattern array and each of the up to seven entries stores up
to four pairs of a duration in pixel clock cycles and an index
to a value table. The table entries are used to define
portions of a line representing a certain value for a certain
number of clock cycles.
The value specified in this table is actually another 3-bit
index into a value array which can hold up to eight 8-bit
values. If bit 4 (MSB) of the index is logic 1, the value is
inserted into the G or Y signal only; if bit 4 = 0, the
associated value is inserted into all three signals.
Two additional bits of the entries in the value array (LSBs
of the second byte) determine if the associated events
outputs.
To ease the trigger set-up for the sync generation module,
a set of registers is provided to set up the screen raster
defined as width and height. A trigger position can be
specified as an x, y co-ordinate within the overall
dimensions of the screen raster. If the x, y counter
matches the specified co-ordinates, a trigger pulse is
generated which pre-loads the tables with their initial
values.
Table 6 outlines an example on how to set up the sync
tables for a 1080i HD raster.
Important note:
Due to a problem in the programming interface, writing to
the line pattern array (address D2) might destroy the data
of the line type array (address D1). A work around is to
write the line pattern array data before writing the line type
array. Reading of the arrays is possible but all address
pointers must be initialized before the next write operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7109AE | HD-CODEC |
| SAA7110A | Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器) |
| SAA7111A | Enhanced Video Input Processor EVIP |
| SAA7111AH | Enhanced Video Input Processor EVIP |
| SAA7111AHZ | GT 13C 13#16 SKT PLUG |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7109AE | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:HD-CODEC |
| SAA7109AE/V1,518 | 功能描述:視頻 IC HD- VIDEO CODEC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1,557 | 功能描述:視頻 IC HD- VIDEO CODEC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1/G | 功能描述:視頻 IC PC CODEC (W/OUT MICROVISION) RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1/G,518 | 功能描述:視頻 IC SAA7109AE/LBGA156/REEL13DP//V1 RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。