2
1
P
P
H
S
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Vertical line skip
Blank enable for NI-bypass,
vertical line skip MSB
Border colour Y
Border colour U
Border colour V
HD sync line count array
HD sync line type array
HD sync line pattern array
HD sync value array
HD sync trigger state 1
HD sync trigger state 2
HD sync trigger state 3
HD sync trigger state 4
HD sync trigger phase x
A0
A1
YSKIP7
BLEN
YSKIP6
(1)
YSKIP5
(1)
YSKIP4
(1)
YSKIP3
YSKIP11
YSKIP2
YSKIP10
YSKIP1
YSKIP9
YSKIP0
YSKIP8
A2
A3
A4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FA
FB
FC
BCY7
BCU7
BCV7
BCY6
BCU6
BCV6
BCY5
BCU5
BCV5
BCY4
BCU4
BCV4
BCY3
BCU3
BCV3
BCY2
BCU2
BCV2
BCY1
BCU1
BCV1
BCY0
BCU0
BCV0
RAM address (see Table 123)
RAM address (see Table 125)
RAM address (see Table 127)
RAM address (see Table 129)
HLCT4
HLCPT0
HDCT4
HEPT0
HTX4
(1)
HLCT7
HLCPT3
HDCT7
(1)
HLCT6
HLCPT2
HDCT6
HEPT2
HTX6
(1)
HLCT5
HLCPT1
HDCT5
HEPT1
HTX5
(1)
HLCT3
HLPPT1
HDCT3
(1)
HLCT2
HLPPT0
HDCT2
(1)
HLCT1
HLCT9
HDCT1
HDCT9
HTX1
HTX9
HTY1
HTY9
HDGY
CC1R1
CC1G1
CC1B1
CC2R1
CC2G1
CC2B1
AUXR1
AUXG1
AUXB1
XCP1
XCP9
YCP1
YCP9
HLCT0
HLCT8
HDCT0
HDCT8
HTX0
HTX8
HTY0
HTY8
HDIP
CC1R0
CC1G0
CC1B0
CC2R0
CC2G0
CC2B0
AUXR0
AUXG0
AUXB0
XCP0
XCP8
YCP0
YCP8
HTX7
(1)
HTX3
HTX11
HTY3
(1)
HTX2
HTX10
HTY2
(1)
HD sync trigger phase y
HTY7
(1)
HTY6
(1)
HTY5
(1)
HTY4
(1)
HD output control
Cursor colour 1 R
Cursor colour 1 G
Cursor colour 1 B
Cursor colour 2 R
Cursor colour 2 G
Cursor colour 2 B
Auxiliary cursor colour R
Auxiliary cursor colour G
Auxiliary cursor colour B
Horizontal cursor position
Horizontal hot spot, MSB XCP
Vertical cursor position
Vertical hot spot, MSB YCP
(1)
(1)
(1)
(1)
HDSYE
CC1R3
CC1G3
CC1B3
CC2R3
CC2G3
CC2B3
AUXR3
AUXG3
AUXB3
XCP3
XHS0
YCP3
YHS0
HDTC
CC1R2
CC1G2
CC1B2
CC2R2
CC2G2
CC2B2
AUXR2
AUXG2
AUXB2
XCP2
XCP10
YCP2
(1)
CC1R7
CC1G7
CC1B7
CC2R7
CC2G7
CC2B7
AUXR7
AUXG7
AUXB7
XCP7
XHS4
YCP7
YHS4
CC1R6
CC1G6
CC1B6
CC2R6
CC2G6
CC2B6
AUXR6
AUXG6
AUXB6
XCP6
XHS3
YCP6
YHS3
CC1R5
CC1G5
CC1B5
CC2R5
CC2G5
CC2B5
AUXR5
AUXG5
AUXB5
XCP5
XHS2
YCP5
YHS2
CC1R4
CC1G4
CC1B4
CC2R4
CC2G4
CC2B4
AUXR4
AUXG4
AUXB4
XCP4
XHS1
YCP4
YHS1
REGISTER FUNCTION
SUB
ADDR.
(HEX)
D7
D6
D5
D4
D3
D2
D1
D0