參數(shù)資料
型號： SAA7105E
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Digital video encoder
中文描述： COLOR SIGNAL ENCODER, PBGA156
封裝： 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156
文件頁數(shù)： 46/70頁
文件大小： 360K
代理商： SAA7105E
2004 Mar 04
46
Philips Semiconductors
Product specification
Digital video encoder
SAA7104E; SAA7105E
Table 94
Layout of the data bytes in the line pattern array
Table 95
Subaddress D3H
Table 96
Layout of the data bytes in the value array
Table 97
Subaddresses D4H and D5H
Table 98
Subaddresses D6H and D7H
Table 99
Subaddresses D8H and D9H
BYTE
DESCRIPTION
0
1
2
3
4
5
6
7
HPD07
HPV03
HPD17
HPV13
HPD27
HPV23
HPD37
HPV33
HPD06
HPV02
HPD16
HPV12
HPD26
HPV22
HPD36
HPV32
HPD05
HPV01
HPD14
HPV11
HPD25
HPV21
HPD35
HPV31
HPD04
HPV00
HPD14
HPV10
HPD24
HPV20
HPD34
HPV30
HPD03
0
HPD13
0
HPD23
0
HPD33
0
HPD02
0
HPD12
0
HPD22
0
HPD32
0
HPD01
HPD09
HPD11
HPD19
HPD21
HPD29
HPD31
HPD39
HPD00
HPD08
HPD10
HPD18
HPD20
HPD28
HPD30
HPD38
DATA BYTE
DESCRIPTION
HPVA
RAM start address for the HD sync value array; the byte following subaddress D3 points to the first
cell to be loaded with the next transmitted byte; succeeding cells are loaded by auto-incrementing
until stop condition. Each line pattern array entry consists of 2 bytes. The array has 8 entries.
HD pattern value entry. The HD path will insert a level of (HPV + 52)
×
0.66 IRE into the data path.
The value is signed 8-bits wide; see Table 96.
HD horizontal sync. If the HD engine is active, this value will be provided at pin HSM_CSYNC;
see Table 96.
HD vertical sync. If the HD engine is active, this value will be provided at pin VSM; see Table 96.
HPVE
HHS
HVS
BYTE
DESCRIPTION
0
1
HPVE7
0
HPVE6
0
HPVE5
0
HPVE4
0
HPVE3
0
HPVE2
0
HPVE1
HVS
HPVE0
HHS
DATA BYTE
DESCRIPTION
HLCT
HLCPT
HLPPT
state of the HD line counter after trigger, note that it counts backwards
state of the HD line type pointer after trigger
state of the HD pattern pointer after trigger
DATA BYTE
DESCRIPTION
HDCT
HEPT
state of the HD duration counter after trigger, note that it counts backwards
state of the HD event type pointer in the line type array after trigger
DATA BYTE
DESCRIPTION
HTX
horizontal trigger phase for the HD sync engine in pixel clocks
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7105E/V1/G 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7105E/V1/G,518 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7105E/V1/G,557 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7105E/V1/G-T 功能描述:視頻 IC PC-DENC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAA7105E/V1/S1,518 功能描述:視頻 IC DIGITAL VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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