參數(shù)資料
型號: SAA7105E
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Digital video encoder
中文描述: COLOR SIGNAL ENCODER, PBGA156
封裝: 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156
文件頁數(shù): 43/70頁
文件大?。?/td> 360K
代理商: SAA7105E
2004 Mar 04
43
Philips Semiconductors
Product specification
Digital video encoder
SAA7104E; SAA7105E
Table 79
Subaddress 97H
Table 80
Subaddresses 98H and 99H
Table 81
Subaddress 99H
DATA BYTE
LOGIC
LEVEL
DESCRIPTION
HFS
0
1
horizontal sync is directly derived from input signal (slave mode) at pin HSVGC
horizontal sync is derived from a frame sync signal (slave mode) at pin FSVGC (only if
EFS is set HIGH)
vertical sync (field sync) is directly derived from input signal (slave mode) at
pin VSVGC
vertical sync (field sync) is derived from a frame sync signal (slave mode) at
pin FSVGC (only if EFS is set HIGH)
pin FSVGC is switched to input
pin FSVGC is switched to active output
polarity of signal at pin FSVGC in output mode (master mode) is active HIGH; rising
edge of the input signal is used in slave mode
polarity of signal at pin FSVGC in output mode (master mode) is active LOW; falling
edge of the input signal is used in slave mode
pin VSVGC is switched to input
pin VSVGC is switched to active output
polarity of signal at pin VSVGC in output mode (master mode) is active HIGH; rising
edge of the input signal is used in slave mode
polarity of signal at pin VSVGC in output mode (master mode) is active LOW; falling
edge of the input signal is used in slave mode
pin HSVGC is switched to input
pin HSVGC is switched to active output
polarity of signal at pin HSVGC in output mode (master mode) is active HIGH; rising
edge of the input signal is used in slave mode
polarity of signal at pin HSVGC in output mode (master mode) is active LOW; falling
edge of the input signal is used in slave mode
VFS
0
1
OFS
0
1
0
PFS
1
OVS
0
1
0
PVS
1
OHS
0
1
0
PHS
1
DATA BYTE
DESCRIPTION
HLEN
horizontal length;
DATA BYTE
DESCRIPTION
IDEL
input delay; defines the distance in PIXCLKs between the active edge of CBO and the first received
valid pixel
HLEN
numberline
1
=
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