2000 Jun 14
15
Philips Semiconductors
Preliminary specification
Digital audio broadcast channel decoder
SAA3500H
For full details of the L3-bus interface specification, please, refer to the SAA2502H data sheet (order number
9397 750 03068 or at http://www.semiconductors.com/products).
9.7.3
M
ICROCONTROLLER INTERFACE REGISTERS
Communication between the microcontroller and the SAA3500H is by addressing registers and writing or reading data.
All addresses and register contents are in hexadecimal notation.
The following registers are available for the writing of data:
Table 8
Writeable registers
ADDRESS
(HEX)
NAME
DESCRIPTION
SETTING AFTER RESET
(HEX)
00
01
10
20
21
30
31
32
40
41
42
50
51
60
62
63
70
Control
Configuration
CIFCount
CurSubChSel
NextSubChSel
SOD1
SOD2
SOD3
AGCExternal
AGCInternal
AGCFixed
NullDetMargin
TIIControl
MixerFreqInput
CarrierShift
AFCGain
ATCWinControl
control
configuration
CIF count and occurrence change flag
current sub-channel selection
next sub-channel selection
select sub-channel for serial output SOD1
select sub-channel for serial output SOD2
select sub-channel for serial output SOD3
setting of thresholds for external AGC
settings of the internal AGC
internal AGC switch off and fixed gain setting
null detector margin
TII main/sub identifier
digital mixer frequency control input
carrier shift by n carrier positions
AFC loop gain
ATC window control input or FFT window position and null
detector delay compensation
CIR detector thresholds, edge and range
ATC loops gains; clock I and P gains and window gain
1F
FF
00 00 00
00 00 00 00
00 00 00 00
40
40
40
61 0C
D0 49
00
40
00 00
80 00 00
00
10
96
71
73
CIRThreshold
ATCGains
02 02
02 04 20
CMODE
CDATA
2
7
8
1
MSB
LSB
CCLK
2
7
8
1
MSB
LSB
addressing mode
data mode
Fig.14 L3-bus command transfer example.