參數(shù)資料
型號(hào)： SAA3323GP
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Drive processor for DCC systems
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, SOT-318-2, QFP-80
文件頁(yè)數(shù)： 25/56頁(yè)
文件大?。?/td> 274K
代理商： SAA3323GP
May 1994
25
Philips Semiconductors
Preliminary specification
Drive processor for DCC systems
SAA3323
Tape deck capstan control connections
S
PEED
This pin outputs a pulse width modulated signal that may
be used for controlling the tape capstan of the deck.
Operation of the SPEED control signal
Table 19 gives the sources that determine the duty factor
of the SPEED signal. Note that the 3-state SPEED output
may be put into high-impedance state by programming the
TFE setting by bit HiZSpd.
Table 19
SPEED signal duty factor.
Notes
1.
“Tape” means that the duty factor has been calculated
from the played back main data tape signal. When
tape is the source for the duty factor of the SPEED
signal, the type of regulation can be chosen with the
TFE settings bits EnFReg and SeINBand.
“
μ
C” means that the microcontroller programs the duty
factor via the SPDDTY register.
“50%” means that the duty factor is fixed at 50%.
2.
3.
MODE
μ
CSPD
SOURCE FOR
SPEED DUTY
FACTOR
tape
(1)
μ
C
(2)
tape
(1)
μ
C
(2)
50%
(3)
μ
C
(2)
DPAP
DPAP
DPAR
DPAR
DRAR
DRAR
0
1
0
1
0
1
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