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參數(shù)資料
| 型號： | SAA2501 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital Audio Broadcast DAB decoder |
| 中文描述： | 數(shù)字音頻廣播民建聯(lián)的解碼器 |
| 文件頁數(shù)： | 34/52頁 |
| 文件大?。?/td> | 206K |
| 代理商： | SAA2501 |
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January 1995
34
Philips Semiconductors
Preliminary specification
Digital Audio Broadcast (DAB) decoder
SAA2501
During operation 2 modes can be identified:
1.
Addressing mode (AM).
During addressing mode a single byte is sent by the microcontroller. This byte consists of 2 data operation mode
(DOM) bits and 6 operational address (OA) bits. Each of the slave devices evaluates the operational address. Only
the device that has been issued the same operational address will become active during the following data mode.
The operation to be executed during the data mode is indicated by the two data operation mode bits.
2.
Data mode (DM).
During data mode information is transferred between microcontroller and slave device. The transfer direction may
be from microcontroller to slave (‘write’) or from slave to microcontroller (‘read’). However, during one data mode the
transfer direction cannot change.
8.1.1.1
Addressing mode
In order to start an addressing mode the microcontroller will make the L3MODE line LOW. The L3CLK line is put to the
LOW state 8 times and the DATA line will carry 8 bits. The addressing mode is ended by making the L3MODE line HIGH.
Table 35
Preferred allocations
DOM1
DOM0
FUNCTION
REMARKS
0
0
1
1
0
1
0
1
data from microcontroller to SAA2501
data from SAA2501 to microcontroller
control from microcontroller to SAA2501
status from SAA2501 to microcontroller
general purpose data transfer
general purpose data transfer
e.g. register selection for data transfer
short device status message
handbook, halfpage
0
1
2
3
4
5
6
7
L3CLK
L3DATA
MGB505
Fig.16 Addressing mode.
The meaning of the bits on L3DATA.
Bit 0 and bit 1; these are the data operation mode (DOM) bits that indicate the nature of the following data transfer. Each slave device may have
its own allocation of operation modes to the 4 possible codes of these bits. For correct information about the operation the device will perform, refer
to the descriptions of the individual ICs. For new designs the preferred allocations are given in Table 35.
Bit 2 to bit 7; these bits act as 6 bit (special function) operational IC address, with bit 7 as MSB and bit 2 as LSB. Bit 7 to bit 5 act as system
identification and bit 4 to bit 2 as identification of the device within the system.
相關PDF資料 |
PDF描述 |
|---|---|
| SAA2501H | Digital Audio Broadcast DAB decoder |
| SAA2502 | ISO/MPEG Audio Source Decoder |
| SAA2502H | ISO/MPEG Audio Source Decoder |
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
| SAA2503HT | MPEG2 audio decoder |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2501H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Audio Decoder & Support |
| SAA2502 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
| SAA2502H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
| SAA2503 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG2 audio decoder |
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