參數(shù)資料
型號: SAA2501
廠商: NXP Semiconductors N.V.
英文描述: Digital Audio Broadcast DAB decoder
中文描述: 數(shù)字音頻廣播民建聯(lián)的解碼器
文件頁數(shù): 23/52頁
文件大小: 206K
代理商: SAA2501
January 1995
23
Philips Semiconductors
Preliminary specification
Digital Audio Broadcast (DAB) decoder
SAA2501
7.20.2
L3
TRANSFER TYPES
The L3 protocol enables the reading and writing of control,
status and data. In the L3 protocol, the host first issues an
8 bit wide ‘operational address’ on L3DATA while keeping
L3MODE LOW. All devices connected to the L3 bus read
the operational address. Next, data transfers from or to the
host are done while keeping L3MODE HIGH. The devices
with an L3 operational address differing from the issued
one must ignore these data transfers until the next
operational address is issued. Only the device with an
address equal to the issued operational address performs
the transfer.
The SAA2501 has the L3 operational address as shown in
Table 13.
Table 13
L3 operational address.
Note
1.
The ‘Data Operation Mode’ bits DOM1 and DOM0 determine the mode in which the SAA2501 L3 interface will stay
until the next time an L3 operational address is issued (see Table 14).
7
6
5
4
3
2
1
0
0
1
1
0
0
0
DOM1
(1)
DOM0
(1)
Table 14
DOM1 and DOM0 bits
Control bytes can be written to the SAA2501.
Data is transferred to or from the SAA2501 in so-called
data items. The items can be a readable or writeable type.
A data item transfer is initiated by writing the
DOM1
DOM0
TRANSFER TYPE
0
0
1
1
0
1
0
1
write item data
read item data
write control to SAA2501
read SAA2501 status
corresponding control byte to the SAA2501 first. Next, the
item data itself is transferred, always as an integer number
of bytes.
The status of the SAA2501 can be read via L3. The
SAA2501 status flag L3RDY must be monitored before
transferring data item bytes to avoid transferring bytes
faster than the L3 interface of the SAA2501 can handle.
7.20.3
L3
INTERFACE INITIALIZATION AT AN
SAA2501
DEVICE RESET
Figure 15 shows the mandatory actions that must be taken
for correct L3 interface start-up at a device reset.
Fig.15 L3 interface initialization procedure.
handbook, full pagewidth
RESET
L3MODE
L3CLK
1
2
3
MGB503
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