參數(shù)資料
型號(hào): S80C32-44:RD
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 44 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 52/152頁(yè)
文件大?。?/td> 2528K
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145
2486AA–AVR–02/2013
ATmega8(L)
The recommendations of the maximum Receiver baud rate error was made under the assump-
tion that the Receiver and Transmitter equally divides the maximum total error.
There are two possible sources for the Receivers Baud Rate error. The Receiver’s system clock
(XTAL) will always have some minor instability over the supply voltage range and the tempera-
ture range. When using a crystal to generate the system clock, this is rarely a problem, but for a
resonator the system clock may differ more than 2% depending of the resonators tolerance. The
second source for the error is more controllable. The baud rate generator can not always do an
exact division of the system frequency to get the baud rate wanted. In this case an UBRR value
that gives an acceptable low error can be used if possible.
Multi-processor
Communication
Mode
Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering
function of incoming frames received by the USART Receiver. Frames that do not contain
address information will be ignored and not put into the receive buffer. This effectively reduces
the number of incoming frames that has to be handled by the CPU, in a system with multiple
MCUs that communicate via the same serial bus. The Transmitter is unaffected by the MPCM
setting, but has to be used differently when it is a part of a system utilizing the Multi-processor
Communication mode.
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indi-
cates if the frame contains data or address information. If the Receiver is set up for frames with
nine data bits, then the ninth bit (RXB8) is used for identifying address and data frames. When
the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the
frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several Slave MCUs to receive data from a
Master MCU. This is done by first decoding an address frame to find out which MCU has been
addressed. If a particular Slave MCU has been addressed, it will receive the following data
frames as normal, while the other Slave MCUs will ignore the received frames until another
address frame is received.
Using MPCM
For an MCU to act as a Master MCU, it can use a 9-bit character frame format (UCSZ = 7). The
ninth bit (TXB8) must be set when an address frame (TXB8 = 1) or cleared when a data frame
(TXB = 0) is being transmitted. The Slave MCUs must in this case be set to use a 9-bit character
frame format.
The following procedure should be used to exchange data in Multi-processor Communication
mode:
1.
All Slave MCUs are in Multi-processor Communication mode (MPCM in UCSRA is set)
2.
The Master MCU sends an address frame, and all slaves receive and read this frame. In
the Slave MCUs, the RXC Flag in UCSRA will be set as normal
3.
Each Slave MCU reads the UDR Register and determines if it has been selected. If so, it
clears the MPCM bit in UCSRA, otherwise it waits for the next address byte and keeps
the MPCM setting
4.
The addressed MCU will receive all data frames until a new address frame is received.
The other Slave MCUs, which still have the MPCM bit set, will ignore the data frames
5.
When the last data frame is received by the addressed MCU, the addressed MCU sets
the MPCM bit and waits for a new address frame from Master. The process then repeats
from 2
Using any of the 5-bit to 8-bit character frame formats is possible, but impractical since the
Receiver must change between using n and n+1 character frame formats. This makes full-
duplex operation difficult since the Transmitter and Receiver uses the same character size set-
ting. If 5-bit to 8-bit character frames are used, the Transmitter must be set to use two stop bit
(USBS = 1) since the first stop bit is used for indicating the frame type.
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