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參數(shù)資料
| 型號(hào)： | S71WS512N80BAWZZ2 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和移動(dòng)存儲(chǔ)芯片的CMOS 1.8伏特 |
| 文件頁(yè)數(shù)： | 86/142頁(yè) |
| 文件大?。?/td> | 1996K |
| 代理商： | S71WS512N80BAWZZ2 |
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86
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
Erase/Program Operations @ V
IO
= 1.8 V
Parameter
Notes:
1. Not 100% tested.
2. Asynchronous read mode allows Asynchronous program operation only. Synchronous read mode allows both
Asynchronous and Synchronous program operation.
3. In asynchronous program operation timing, addresses are latched on the falling edge of WE#. In synchronous
program operation timing, addresses are latched on the active edge of CLK or rising edge of AVD#.
4. See the
“Erase and Programming Performance”
section for more information.
5. Does not include the preprogramming time.
Description
54 MHz
70
5
66 MHz
70
4
0
6
Unit
ns
ns
JEDEC
t
AVAV
Standard
t
WC
Write Cycle Time
(Note 1)
Min
t
AVWL
t
AS
Address Setup Time (Notes
2
,
3
)
Synchronous
Asynchronous
Synchronous
Asynchronous
Min
t
WLAX
t
AH
Address Hold Time (Notes
2
,
3
)
Min
7
ns
20
t
AVDP
t
DS
t
DH
t
GHWL
t
CAS
t
CH
t
WP
t
WPH
t
SR/W
t
WHWH1
t
WHWH1
AVD# Low Time
Data Setup Time
Data Hold Time
Read Recovery Time Before Write
CE# Setup Time to AVD#
CE# Hold Time
Write Pulse Width
Write Pulse Width High
Latency Between Read and Write Operations
Programming Operation
(Note 4)
Accelerated Programming Operation
(Note 4)
Sector Erase Operation (Notes
4
,
5
)
Chip Erase Operation (Notes
4
,
5
)
V
ACC
Rise and Fall Time
V
Setup Time (During Accelerated Programming)
V
CC
Setup Time
CE# Setup Time to WE#
AVD# Setup Time to WE#
AVD# Hold Time to WE#
AVD# Setup Time to CLK
AVD# Hold Time to CLK
Clock Setup Time to WE#
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
12
45
10
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
t
DVWH
t
WHDX
t
GHWL
0
0
0
0
t
WHEH
t
WLWH
t
WHWL
30
25
20
0
<9.4
<4
0.4
t
WHWH1
t
WHWH1
t
WHWH2
t
WHWH2
Typ
sec
<104 (WS256N)
500
1
50
5
5
5
5
5
5
t
VID
t
VIDS
t
VCS
t
CS
t
AVSW
t
AVHW
t
AVSC
t
AVHC
t
CSW
Min
Min
Min
Min
Min
Min
Min
Min
Min
ns
μs
μs
ns
ns
ns
ns
ns
ns
t
ELWL
4
4
4
4
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S71WS512N80BAWZZ3 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ2 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ3 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512N80BAWZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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