- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374668 > S5935_07 (Applied Micro Circuits Corp.) PCI Product PDF資料下載
參數(shù)資料
| 型號(hào)： | S5935_07 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | PCI Product |
| 中文描述： | 的PCI產(chǎn)品 |
| 文件頁(yè)數(shù)： | 156/204頁(yè) |
| 文件大?。?/td> | 1897K |
| 代理商： | S5935_07 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)當(dāng)前第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)
S5935 – PCI Product
156 DS1527
AMCC Confidential and Proprietary
Revision 1.02 – June 27, 2006
Data Book
Single Cycle Pass-Thru Reads
A single cycle Pass-Thru read operation occurs when
a PCI initiator reads a single value from a Pass-Thru
region. PCI single cycle transfers consists of an
address phase and a one data phase. During the ad-
dress phase of the PCI transfer, the S5935 stores the
PCI address into the Pass-Thru Address Register
(APTA). If the S5935 determines that the address is
within one of its defined Pass-Thru regions, it indicates
to the Add-On that a write to the Pass-Thru Data Reg-
ister (APTD) is required.
Figure 3 shows a single cycle Pass-Thru read access
(Add-On write) using PTADR#. The Add-On reads
data from a source on the Add-On and writes it to the
APTD register.
Pass-Thru Burst Writes
A Pass-Thru burst write operation occurs when a PCI
initiator writes multiple values to a Pass-Thru region. A
PCI burst cycle consists of an address phase and mul-
tiple data phases. During the address phase of the
PCI transfer, the S5935 stores the PCI address into
the Pass-Thru Address Register (APTA). If the S5935
determines that the address is within one of its defined
Pass-Thru regions, it captures the PCI data into the
Pass-Thru Data Register (APTD). After the Add-On
completes each read from the Pass-Thru data register
(asserts PTRDY#), the next data phase is initiated.
Figure 4 shows a 6 data phase Pass-Thru burst write
(Add-On read). In this case, the Add-On asserts
PTADR# and then reads multiple data phases from the
S5935. This works well for Add-On logic which sup-
ports burst cycles. If the Add-On logic does not
support burst accesses, PTADR# may be pulsed
before each data phase. The S5935 automatically
increments the address in the APTA register during
PCI burst cycles. In this example PTRDY# is always
asserted, indicating Add-On logic is capable of accept-
ing data at a rate of one DWORD per clock cycle.
Clock 0:
PCI address information is stored in the S5935 Pass-Thru Address Register. The PCI cycle is recognized as an
access to Pass-Thru region 1. PTATN# is asserted by the S5935 to indicate a Pass-Thru access is occurring.
Clock 1:
Pass-Thru status signals indicate what action is required by Add-On logic. Pass-Thru status outputs are valid
when PTATN# is active and are sampled by the Add-On at the rising edge of clock 1.
PTBURST#
Deasserted. The access has a single data phase. PTNUM[1:0] 01. Indicates the PCI access was
to Pass-Thru region 1.
PTWR
Deasserted. The Pass-Thru access is a read.
PTBE[3:0]#
0h. Indicate the Pass-Thru access is 32-bits.
The PTADR# input is asserted to read the Pass-Thru Address Register. The byte enable, address, and SELECT#
inputs are changed during this clock to select the Pass-Thru Data Register during clock cycle 3.
Clock 2:
This clock is required to avoid contention on the DQ bus. Time must be allowed after PTADR# is deasserted for
the DQ outputs to float before Add-On logic attempts to write to the Pass-Thru Data Register.
Clock 3:
SELECT#, byte enables, and the address inputs remain valid to write the Pass-Thru Data Register at offset 2Ch.
If WR# is asserted at the rising edge of clock 3, data on the DQ bus is latched into APTD.
If PTRDY# is asserted at the rising edge of clock 3, PTATN# is immediately deasserted and the Pass-Thru
access is completed at clock 4.
Clock 4:
If Add-On logic requires more time to write the Pass-Thru data register (slower memory or peripherals), PTRDY#
can be delayed, extending the cycle. PTRDY# asserted at the rising edge of clock 4 causes PTATN# to be imme-
diately deasserted and the Pass-Thru access is completed at clock 5.
Clock 5:
PTATN# and PTBURST# deasserted at the rising edge of clock 5 indicates the Pass-Thru access is complete.
The S5935 can accept new Pass-Thru accesses from the PCI bus at clock 6.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S5935QRC | PCI Product |
| S5935TFC | PCI Product |
| S5935TF | PCI 5V Bus Master/Target Device 32-bit |
| S5935 | PCI 5V Bus Master/Target Device 32-bit |
| S5935QF | PCI 5V Bus Master/Target Device 32-bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S59355QRC | 制造商:AppliedMicro 功能描述: |
| S5935QF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935QRC | 制造商:AppliedMicro 功能描述:PCI Master Device 160-Pin PQFP |
| S5935TF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI 5V Bus Master/Target Device 32-bit |
| S5935TFC | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。