
RESET and POWER-DOWN 
S3C94A5/F94A5 
8-4 
HARDWARE RESET
VALUES 
Table 8-1 list the values for CPU and system registers, peripheral control registers, and peripheral data registers 
following a RESET operation in normal operating mode. The following notation is used in these table to represent 
specific RESET values: 
— A "1" or a "0" shows the RESET bit value as logic one or logic zero, respectively. 
— An 'x' means that the bit value is undefined following RESET. 
— A dash ('–') means that the bit is either not used or not mapped. 
Table 8-1. Register Values after RESET  
Register Name 
Mnemonic 
Address 
Bit Values after RESET  
Dec 
Hex 
7 
6 
5 
4 
3 
2 
1 
0 
Locations B0H — B3H are not mapped 
Timer 0 control register 
T0CON 
196 
B4H 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 0 data register (high byte) 
T0DATAH 
197 
B5H 
1 
1 
1 
1 
1 
1 
1 
1 
Timer 0 data register (low byte) 
T0DATAL 
198 
B6H 
1 
1 
1 
1 
1 
1 
1 
1 
Timer 0 counter (high byte) 
T0CNTH 
199 
B7H 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 0 counter (low byte) 
T0CNTL 
200 
B8H 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 1 control resistor 
T1CON 
201 
B9H 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 1 data register (high byte) 
T1DATAH 
202 
BAH 
1 
1 
1 
1 
1 
1 
1 
1 
Timer 1 data register (low byte) 
T1DATAL 
203 
BBH 
1 
1 
1 
1 
1 
1 
1 
1 
Timer 1 counter (high byte) 
T1CNTH 
204 
BCH 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 1 counter (low byte) 
T1CNTL 
205 
BDH 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 2 control register 
T2CON 
206 
BEH 
0 
0 
0 
0 
0 
0 
0 
0 
Timer 2 data register 
T2DATA 
207 
BFH 
1 
1 
1 
1 
1 
1 
1 
1 
Timer 2 counter 
T2CNT 
208 
D0H 
0 
0 
0 
0 
0 
0 
0 
0 
A/D converter control register 
ADCON 
209 
D1H 
0 
0 
0 
0 
0 
0 
0 
0 
A/D converter data register (high byte) 
ADDATAH 
210 
D2H 
X 
X 
X 
X 
X 
X 
X 
X 
A/D converter data register (low byte) 
ADDATAL 
211 
D3H 
– 
– 
– 
– 
– 
– 
X 
X 
System clock control register 
CLKCON 
212 
D4H 
0 
0 
0 
0 
0 
0 
0 
0 
System flags register 
FLAGS 
213 
D5H 
X 
X 
X 
X 
– 
– 
– 
– 
Interrupt pending register 1 
INTPND1 
214 
D6H 
– 
0 
0 
0 
0 
0 
0 
0 
Interrupt pending register 2 
INTPND2 
215 
D7H 
0 
0 
0 
0 
0 
0 
0 
0 
Interrupt pending register 3 
INTPND3 
216 
D8H 
0 
0 
0 
0 
0 
0 
0 
0 
Stack pointer 
SP 
217 
D9H 
X 
X 
X 
X 
X 
X 
X 
X 
Watch timer control register 
WTCON 
218 
DAH 
– 
0 
0 
0 
0 
0 
0 
– 
Locations DBH is not mapped