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參數(shù)資料
| 型號： | S3037 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(19.44和77.76 MHz兩種頻率可選的SONET/SDH收發(fā)器) |
| 中文描述： | 的SONET / SDH / ATM的OC-3/12收發(fā)瓦/的CDR（19.44和77.76兆赫兩種頻率可選的的SONET / SDH收發(fā)器） |
| 文件頁數(shù)： | 21/23頁 |
| 文件大?。?/td> | 156K |
| 代理商： | S3037 |
21
S3037
SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR
December 10, 1999 / Revision C
S3037 WITH DATA CLOCK
SYNCHRONOUS TO REFERENCE
CLOCK
In some applications it is necessary to "forward
clock" the data in a SONET/SDH system. In this ap-
plication the reference clock from which the High
speed serial clock is synthesized and the parallel
data clock both originate from the same (usually
TTL/CMOS) clock source. This application note ex-
plains how the AMCC S3037 can be configured to
operate in this mode.
Clock Control Logic Description
The timing control logic in the S3037 automatically
generates an internal load signal which has a fixed
relationship to the reference clock. The logic takes
into account the variation of the reference clock to the
internal load signal over temperature and voltage.
The connections required to implement the design
are shown in Figure 15. The setup and hold times for
the PICLK to the data must be met by the controller
ASIC. It is recommended that latching the data on
the falling edge of the output reference clock be
latched in order to meet the required specifications.
Possible Problems
In order to meet the jitter generation specifications
required by SONET, the jitter of the reference clock
must be minimized. It may be difficult to meet the
SONET jitter generation specifications using a refer-
ence clock input with a TTL reference source.
Power Sequencing
When the S3037 is operated with a 5 volt controller
such as the PMC5355 SUNI, it is recommended that
power be applied to the S3037 before or simulta-
neously (time difference less than 1 ms) with the
application of power to the 5 volt controller. If this
condition cannot be met, series resistance of at least
33
is required on all TTL inputs driven from the 5
volt environment.
Please note that 33
is already recommended on
dynamically switching input signals such as PIN[7:0],
OOF, PICLK, and TTL REF to limit overshoot and
ringing. Static control lines such as LLEB, DLEB,
SLPTIME, MODE[1:0], and RSTB should also be
provided with series resistors of at least 33
(100
Ohms recommended) to limit input current if the 5
volt environment is powered while the 3.3 volt VCC
of the S3037 is off.
APPLICATION NOTE
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