參數(shù)資料
型號: S3035
廠商: Applied Micro Circuits Corp.
英文描述: SONET/SDH/ATM OC-3/12 Transceiver W/CDR(頻率可選,帶片上高頻鎖相環(huán)的SONET/SDH收發(fā)器(完全集成OC-3/12接口器件))
中文描述: 的SONET / SDH / ATM的OC-3/12收發(fā)瓦/的CDR(頻率可選,帶片上高頻鎖相環(huán)的的SONET / SDH收發(fā)器(完全集成OC-3/12接口器件))
文件頁數(shù): 3/22頁
文件大小: 151K
代理商: S3035
3
S3035
SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR
July 25, 2000 / Revision E
Figure 3. STS–12/OC–12 Frame Format
9
12 A1
Bytes
12 A2
Bytes
A1 A1
A1 A1
A2 A2
A2 A2
Transport Overhead 36 Columns
36 x 9 = 324 bytes
Synchronous Payload Envelope 1044 Columns
1044 x 9 = 9396 bytes
125
μ
sec
L
L
S3035 OVERVIEW
The S3035 transceiver implements SONET/SDH se-
rialization/deserialization, transmission, and frame
detection/recovery functions. The block diagram in
Figure 4 shows the basic operation of the chip. This
chip can be used to implement the front end of
SONET equipment, which consists primarily of the
serial transmit interface and the serial receive inter-
face. The chip handles all the functions of these two
elements, including parallel-to-serial and serial-to-par-
allel conversion, clock generation and recovery, and
system timing. The system timing circuitry consists
of management of the data stream, framing, and
clock distribution throughout the front end.
The S3035 is divided into a transmitter section and a
receiver section. The sequence of operations is as
follows:
AMCC CONGO (S1201) POS/ATM SONET Mapper
AMCC NILE (S1202) ATM SONET Mapper
Suggested Interface Devices
Transmitter Operations:
1. 8-bit parallel input
2. Parallel-to-serial conversion
3. Redundant serial output
Receiver Operations:
1. Redundant serial input select
2. Clock and data recovery from serial input
3. Frame detection
4. Serial-to-parallel conversion
5. 8-bit parallel output
Internal clocking and control functions are transpar-
ent to the user.
A lock detect feature is provided on the S3035,
which indicates that the PLL is locked (synchronized)
to the incoming data stream, and facilitates continu-
ous down-stream clocking in the absence of data.
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