參數(shù)資料
型號(hào)： S29NS128N0PBJW000
廠商： SPANSION LLC
元件分類： DRAM
英文描述： Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
中文描述： 8M X 16 FLASH 1.8V PROM, 80 ns, PBGA44
封裝： 9.20 X 8 MM, LEAD FREE, FBGA-44
文件頁(yè)數(shù)： 39/86頁(yè)
文件大?。?/td> 1036K
代理商： S29NS128N0PBJW000
S29NS-N_00_A12 June 13, 2006
S29NS-N MirrorBit Flash Family
37
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Read
and
Synchronous/Burst Read
tables provide the read parameters, and
Figure 19.3 on page 66
and
Figure 19.4 on page 67
show the timings.
10.2
Set Configuration Register Command Sequence
The device uses a configuration register to set the various burst parameters: number of wait states, burst
read mode, RDY configuration, and synchronous mode active. The configuration register must be set before
the device will enter burst mode.
The configuration register is loaded with a four-cycle command sequence. The first two cycles are standard
unlock sequences. On the third cycle, the data should be D0h and address bits should be 555h. During the
fourth cycle, the configuration code should be entered onto the data bus with the address bus set to address
000h. Once the data has been programmed into the configuration register, a software reset command is
required to set the device into the correct state. The device will power up or after a hardware reset with the
default setting, which is in asynchronous mode. The register must be set before the device can enter
synchronous mode. The configuration register can not be changed during device operations (program, erase,
or sector lock).
10.3
Read Configuration Register Command Sequence
The configuration register can be read with a four-cycle command sequence. The first two cycles are
standard unlock sequences. On the third cycle, the data should be C6h and address bits should be 555h.
During the fourth cycle, the configuration code should be read out of the data bus with the address bus set to
address 000h. Once the data has been read from the configuration register, a software reset command is
required to set the device into the correct set mode.
10.3.1
Read Mode Setting
On power-up or hardware reset, the device is set to be in asynchronous read mode. This setting allows the
system to enable or disable burst mode during system operations.
10.3.2
Programmable Wait State Configuration
The programmable wait state feature informs the device of the number of clock cycles that must elapse after
AVD# is driven active before data will be available. This value is determined by the input frequency of the
device.
Configuration Bit CR13–CR11
determine the setting (see
Table 10.1
).
The wait state command sequence instructs the device to set a particular number of clock cycles for the initial
access in burst mode. The number of wait states that should be programmed into the device is directly related
to the clock frequency.
Notes
1. Upon power-up or hardware reset, the default setting is seven wait states.
2. RDY will default to being active with data when the Wait State Setting is set to a total initial access cycle of 2.
It is recommended that the wait state command sequence be written, even if the default wait state value is
desired, to ensure the device is set as expected. A hardware reset will set the wait state to the default setting.
Table 10.1
Programmable Wait State Settings
CR13
CR12
CR11
Total Initial Access Cycles
0
0
0
2
0
0
1
3
0
1
0
4
0
1
1
5
1
0
0
6
1
0
1
7 (default)
1
1
0
Reserved
1
1
1
Reserved
相關(guān)PDF資料
PDF描述
S29NS128N0PBJW002 Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0PBJW003 Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW000 Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW002 Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW003 Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29NS128N0PBJW002 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0PBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW002 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
S29NS128N0SBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
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