參數(shù)資料
型號(hào): S29NS064N0SBJW002
廠商: SPANSION LLC
元件分類: DRAM
英文描述: Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory
中文描述: 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44
封裝: 7.70 X 6.20 MM, LEAD FREE, FBGA-44
文件頁(yè)數(shù): 21/86頁(yè)
文件大?。?/td> 1036K
代理商: S29NS064N0SBJW002
S29NS-N_00_A12 June 13, 2006
S29NS-N MirrorBit Flash Family
19
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
The “write-buffer-page” addresses
must be the same for all address/data pairs loaded into the write
buffer
. (This means Write Buffer Programming
cannot
be performed across multiple “write-buffer-pages”.
This also means that Write Buffer Programming
cannot
be performed across multiple sectors. If the system
attempts to load programming data outside of the selected “write-buffer-page”, the operation will ABORT.)
After writing the Starting Address/Data pair, the system then writes the remaining address/data pairs into the
write buffer. Write buffer locations must be loaded in sequential order.
Note that if a Write Buffer address location is loaded multiple times, the “address/data pair” counter
will be
decremented for every data load operation
. Also, the
last data loaded
at a location before the “Program
Buffer to Flash” confirm command will be programmed into the device. It is the software’s responsibility to
comprehend ramifications of loading a write-buffer location more than once. The counter decrements
for
each data load operation
,
NOT for each unique write-buffer-address location
.
Once the specified number of write buffer locations have been loaded, the system must then write the
“Program Buffer to Flash” command at the Sector Address. Any other address/data write combinations will
abort the Write Buffer Programming operation. The device will then “go busy”. The Data Bar polling
techniques should be used while monitoring the
last address location loaded into the write buffer
. This
eliminates the need to store an address in memory because the system can load the last address location,
issue the program confirm command at the last loaded address location, and then data bar poll at that same
address. DQ7, DQ6, DQ5, DQ2, and DQ1 should be monitored to determine the device status during Write
Buffer Programming.
The write-buffer “embedded” programming operation can be suspended using the standard suspend/resume
commands. Upon successful completion of the Write Buffer Programming operation, the device will return to
READ mode.
The Write Buffer Programming Sequence can be ABORTED under any of the following conditions:
Load a value that is greater than the page buffer size during the “Number of Locations to Program” step.
Write to an address in a sector different than the one specified during the “Write-Buffer-Load” command.
Write an Address/Data pair to a different write-buffer-page than the one selected by the “Starting Address”
during the “write buffer data loading” stage of the operation.
Write data other than the “Confirm Command” after the specified number of “data load” cycles.
The ABORT condition is indicated by DQ1 = 1, DQ7 = DATA# (for the “l(fā)ast address location loaded”), DQ6 =
TOGGLE, DQ5 = 0. This indicates that the Write Buffer Programming Operation was ABORTED. A “Write-to-
Buffer-Abort reset” command sequence is required when using the Write-Buffer-Programming features in
Unlock Bypass mode.
Note: The Secured Silicon sector, autoselect, and CFI functions are unavailable
when a program operation is in progress
.
Use of the write buffer is strongly recommended for programming when multiple words are to be
programmed
. Write buffer programming is allowed in any sequence of memory (or address) locations. These
flash devices are capable of handling multiple write buffer programming operations on the same write buffer
address range without intervening erases. However, programming the same word address multiple times
without intervening erases requires a modified programming method. Please contact your local Spansion
TM
representative for details.
8.11
Autoselect Mode
The autoselect mode provides manufacturer and device identification, and sector protection verification,
through identifier codes output from the internal register (which is separate from the memory array) on DQ15–
DQ0. This mode is primarily intended for programming equipment to automatically match a device to be
programmed with its corresponding programming algorithm. The autoselect codes can also be accessed in-
system.
When verifying sector protection, the sector address must appear on the appropriate highest order address
bits. The remaining address bits are don’t care. When all necessary bits have been set as required, the
programming equipment may then read the corresponding identifier code on DQ15–DQ0. The autoselect
codes can also be accessed in-system through the command register. The command sequence is illustrated
in
Table 11.4,
Command Definitions on page 52
.
Note that if a Bank Address (BA) on address bits A23, A22,
A21, and A20 for the NS256N, A22, A21, A20, A19 for the NS128N and A21, A20, and A19 for the NS064N,
is asserted during the third write cycle of the autoselect command, the host system can read autoselect data
that bank and then immediately read array data from the other bank, without exiting the autoselect mode.
相關(guān)PDF資料
PDF描述
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