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參數(shù)資料
| 型號： | S29NS064N0SBJW002 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封裝： | 7.70 X 6.20 MM, LEAD FREE, FBGA-44 |
| 文件頁數(shù)： | 14/86頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | S29NS064N0SBJW002 |
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12
S29NS-N MirrorBit Flash Family
S29NS-N_00_A12 June 13, 2006
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
6.
Input/Output Descriptions
A23–A16
=
Address Inputs, S29NS256N
A22–A16
=
Address Inputs, S29NS128N
A21-A16
= Address Inputs, S29NS064N
A/DQ15–A/DQ0
=
Multiplexed Address/Data input/output
CE#
=
Chip Enable Input. Asynchronous relative to CLK for the Burst mode
OE#
=
Output Enable Input. Asynchronous relative to CLK for the Burst mode
WE#
=
Write Enable Input
V
CC
V
CCQ
V
SS
V
SSQ
NC
=
Device Power Supply (1.70V–1.95V)
=
Input/Output Power Supply (1.70V–1.95V)
=
Ground
=
Input/Output Ground
=
No Connect; not connected internally
RDY
=
Ready output; indicates the status of the Burst read. V
OL
= data invalid.
V
OH
= data valid
The first rising edge of CLK in conjunction with AVD# low latches address input and
activates burst mode operation. After the initial word is output, subsequent rising edges
of CLK increment the internal address counter. CLK should remain low during
asynchronous access
CLK
=
AVD#
=
Address Valid input. Indicates to device that the valid address is present on the
address inputs (address bits A15–A0 are multiplexed, address bits Amax–A16 are
address only)
V
IL
= for asynchronous mode, indicates valid address; for burst mode, causes starting
address to be latched on rising edge of CLK.
V
IH
= device ignores address inputs
Hardware reset input. V
IL
= device resets and returns to reading array data
Hardware write protect input. V
IL
= disables writes to SA257–258 (S29NS256N),
SA129–130 (S29NS128N) or SA129-130 (S29NS064N). Should be at V
IH
for all other
conditions
RESET#
=
WP#
=
ACC
=
At 9V, accelerates programming; automatically places device in unlock bypass mode.
At V
IL
, disables program and erase functions. Should be at V
IH
for all other conditions
6.1
Logic Symbol
5 to
8
A/DQ15–
A/DQ0
A
m
a
x
- A16
CE#
OE#
WE#
RE
S
ET#
CLK
RDY
AVD#
WP#
ACC
A
m
a
x
indic
a
te
s
the highe
s
t order
a
ddre
ss
b
it.
16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29NS064N0SBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW000 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW002 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0SBJW000 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS064N0SBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128J0LBAW00 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS128J0LBAW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS128J0LBAW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS128J0LBAW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
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