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參數(shù)資料
| 型號： | S29NS064N0SBJW000 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封裝： | 7.70 X 6.20 MM, LEAD FREE, FBGA-44 |
| 文件頁數(shù)： | 56/86頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | S29NS064N0SBJW000 |
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54
S29NS-N MirrorBit Flash Family
S29NS-N_00_A12 June 13, 2006
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Legend
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.
PD(0) = Secured Silicon Sector Lock Bit. PD(0), or bit[0].
PD(1) = Persistent Protection Mode Lock Bit. PD(1), or bit[1], must be set to ‘0’ for protection while PD(2), bit[2] must be left as ‘1’.
PD(2) = Password Protection Mode Lock Bit. PD(2), or bit[2], must be set to ‘0’ for protection while PD(1), bit[1] must be left as ‘1’.
PD(3) = Protection Mode OTP Bit. PD(3) or bit[3].
SA = Address of the sector to be verified (in autoselect mode) or erased. SA includes BA. Address bits A
max
–A14 uniquely select any sector (NS256N and NS128N),
and address bits A
max
- A13 uniquely select any sector (NS064N).
BA = Address of the bank (A23–A20 for S29NS256N, A22–A19 for S29NS128N), and A21-A19 for S29NS064N, that is being switched to autoselect mode, is in
bypass mode, or is being erased.
CR = Configuration Register set by data bits D15-D0.
PWD3–PWD0 = Password Data. PD3–PD0 present four 16 bit combinations that represent the 64-bit Password
PWA = Password Address. Address bits A1 and A0 are used to select each 16-bit portion of the 64-bit entity.
PWD = Password Data.
RD(0) = DQ0 protection indicator bit. If protected, DQ0 = 0, if unprotected, DQ0 = 1.
RD(1) = DQ1 protection indicator bit. If protected, DQ1 = 0, if unprotected, DQ1 = 1.
RD(2) = DQ2 protection indicator bit. If protected, DQ2 = 0, if unprotected, DQ2 = 1.
RD(4) = DQ4 protection indicator bit. If protected, DQ4 = 0, if unprotected, DQ4 = 1.
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes
1. See
Table 8.1 on page 14
for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the autoselect command sequence, all bus cycles are write cycles.
4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD and PD.
5. Unless otherwise noted, address bits A
max
–A12 are don’t cares.
6. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset
command to return the device to reading array data.
7. No unlock or command cycles required when bank is reading array data.
Secured Silicon Sector Command Definitions
S
Secured Silicon Sector
Entry (
21
)
3
555
AA
2AA
55
555
88
Secured Silicon Sector
Program
2
XX
A0
00
data
Secured Silicon Sector
Read
1
00
data
Secured Silicon Sector Exit
(
24
)
4
555
AA
2AA
55
555
90
XX
00
Volatile Sector Protection Command Set Definitions
D
Volatile Sector Protection
Command Set Entry (
21
)
3
555
AA
2AA
55
(BA)
555
E0
DYB Set
2
XX
A0
(BA)
SA
00
DYB Clear
2
XX
A0
(BA)
SA
01
DYB Status Read
1
(BA)
SA
RD(0)
Volatile Sector Protection
Command Set Exit (
24
)
2
XX
90
XX
00
Table 11.4
Command Definitions (Sheet 3 of 3)
Command Sequence
(Notes)
C
Bus Cycles (Notes
1
–
6
)
First
Second
Third
Fourth
Fifth
Sixth
Seventh
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29NS064N0SBJW002 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW000 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW002 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128N0PBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS064N0SBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS128J0LBAW00 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS128J0LBAW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS128J0LBAW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
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