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Publication Number
S29NS-N_00
Revision
A
Amendment
12
Issue Date
June 13, 2006
Distinctive Characteristics
Single 1.8V read, program and erase (1.70V to 1.95V)
VersatileIO Feature
– Device generates data output voltages and tolerates data input
voltages as determined by the voltage on the V
CCQ
pin
– 1.8V compatible I/O signals
Multiplexed Data and Address for reduced I/O count
– A15–A0 multiplexed as DQ15–DQ0
– Addresses are latched by AVD# control input when CE# low
Simultaneous Read/Write operation
– Data can be continuously read from one bank while executing
erase/program functions in other bank
– Zero latency between read and write operations
Read access times at 80/66 MHz
– Burst access times of 9/11 ns at industrial temperature range
– Asynchronous random access times of 80 ns
– Synchronous random access times of 80 ns
Burst length
– Continuous linear burst
– 8/16/32 word linear burst with wrap around
– 8/16/32 word linear burst without wrap around
Secured Silicon Sector region
– 256 words accessible through a command sequence
– 128 words for the Factory Secured Silicon Sector
– 128 words for the Customer Secured Silicon Sector
Power dissipation (typical values: 8 bits switching,
C
L
= 30 pF) @ 80 MHz
– Continuous Burst Mode Read: 28 mA (at 66MHz)
– Simultaneous Operation: 50 mA
– Program/Erase: 19 mA
– Standby mode: 20 μA
Sector Architecture
– Four 16 K word sectors (S29NS256N and S29NS128N) and four 8K
word sectors (S29NS064N) in upper-most address range
– Two-hundred-fifty-five 64-Kword sectors (S29NS256N), one-
hundred-twenty-seven 64-Kword sectors (S29NS128N) and one
hundred twenty-seven 32Kword sectors (S29NS064N)
– Sixteen banks (S29NS128N and S29NS256N) and eight banks
(S29NS064N)
High Performance
– Typical word programming time of 40 μs
– Typical effective word programming time of 9.4 μs utilizing a
32-Word Write Buffer at V
CC
Level
– Typical effective word programming time of 6 μs utilizing a 32-Word
Write Buffer at ACC Level
– Typical sector erase time of 150 ms for 16 Kword sectors and
800 ms sector erase time for 64 Kword sectors
Security features
Persistent Sector Protection
– A command sector protection method to lock combinations of
individual sectors to prevent program or erase operations within that
sector
– Sectors can be locked and unlocked in-system at V
CC
level
Password Sector Protection
– A sophisticated sector protection method to lock combinations of
individual sectors to prevent program or erase operations within that
sector using a user-defined 64-bit password
Hardware Sector Protection
– WP# protects the two highest sectors
– All sectors locked when ACC = V
IL
Handshaking feature
– Provides host system with minimum possible latency by monitoring
RDY
Supports Common Flash Memory Interface (CFI)
Software command set compatible with JEDEC 42.4
standards
– Backwards compatible with Am29F and Am29LV families
Manufactured on 110 nm MirrorBit
TM
process technology
Cycling endurance: 100,000 cycles per sector typical
Data retention: 20 years typical
Data# Polling and toggle bits
– Provides a software method of detecting program and erase
operation completion
Erase Suspend/Resume
– Suspends an erase operation to read data from, or program data to,
a sector that is not being erased, then resumes the erase operation
Program Suspend/Resume
– Suspends a programming operation to read data from a sector other
than the one being programmed, then resume the programming
operation
Unlock Bypass Program command
– Reduces overall programming time when issuing multiple program
command sequences
Packages
– 48-ball Very Thin FBGA (S29NS256N)
– 44-ball Very Thin FBGA (S29NS128N, S29NS064N)
S29NS-N MirrorBit Flash Family
S29NS256N, S29NS128N, S29NS064N
256/128/64 Megabit (16/8/4M x 16-bit), CMOS 1.8 Volt-only
Simultaneous Read/Write, Multiplexed, Burst Mode
Flash Memory
Data Sheet
(Advance Information)