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參數(shù)資料
| 型號(hào)： | S29CD032G0RQFI012 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 1M X 32 FLASH 2.7V PROM, 48 ns, PQFP80 |
| 封裝： | LEAD FREE, PLASTIC, MO-108CB-1, QFP-80 |
| 文件頁數(shù)： | 10/81頁 |
| 文件大?。?/td> | 1276K |
| 代理商： | S29CD032G0RQFI012 |
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16
S29CD-G Flash Family
S29CD-G_00_B1 March 3, 2009
Data
Sheet
(Pre limin ar y)
9.
Pin Configuration
10. Logic Symbols
10.1
S29CD032G
A0–A19
20-bit address bus for 32 Mb device, (19-bit for 16 Mb). A9 supports 12 V autoselect inputs.
DQ0–DQ31
32-bit data inputs/outputs/float
CE#
Chip Enable Input. This signal is asynchronous relative to CLK for the burst mode.
OE#
Output Enable Input. This signal is asynchronous relative to CLK for the burst mode.
WE#
Write enable. This signal is asynchronous relative to CLK for the burst mode.
VSS
Device ground
NC
Pin not connected internally
RY/BY#
Ready/Busy output and open drain. When RY/BY# = VOH, the device is ready to accept read operations and
commands. When RY/BY# = VOL, the device is either executing an embedded algorithm or the device is executing a
hardware reset operation.
CLK
Clock Input that can be tied to the system or microprocessor clock and provides the fundamental timing and internal
operating frequency.
ADV#
Load Burst Address input. Indicates that the valid address is present on the address inputs.
IND#
End of burst indicator for finite bursts only. IND is low when the last word in the burst sequence is at the data outputs.
WAIT#
Provides data valid feedback only when the burst length is set to continuous.
WP#
Write Protect input. When WP# = VOL, the two outermost bootblock sector in the 75% bank are write protected
regardless of other sector protection configurations.
ACC
Acceleration input. When taken to 12 V, program and erase operations are accelerated. When not used for acceleration,
ACC = VSS to VCC.
VIO (VCCQ)
Output Buffer Power Supply (1.65 V to 2.75 V)
VCC
Chip Power Supply (2.5 V to 2.75 V) or (3.00 V to 3.60 V)
RESET#
Hardware reset input
MCH
Must Connect High (to VCC)
20
32
DQ0–DQ31
A0–A19
CLK
RY/BY#
CE#
OE#
WE#
RESET#
ADV#
ACC
WP#
VIO (VCCQ)
IND/WAIT#
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| S29CL032J0JFAM020 | 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80 |
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| S29CL032J0RFAM012 | 1M X 32 FLASH 3.3V PROM, 48 ns, PBGA80 |
| S29GL032A10TAIR11 | Ceramic Chip Capacitors / High Voltage; Capacitance [nom]: 3.3pF; Working Voltage (Vdc)[max]: 500V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Solder (SnPb) Plated Nickel Barrier; Body Dimensions: 0.079" x 0.049"; Container: Bulk; Features: High Voltage; Unmarked |
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| S29CD032J0PFAM010 | 制造商:Spansion 功能描述: |
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