- 您現(xiàn)在的位置：買賣IC網 > PDF目錄98069 > S1R72V17B00A UNIVERSAL SERIAL BUS CONTROLLER, PBGA60 PDF資料下載
參數(shù)資料
| 型號： | S1R72V17B00A |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA60 |
| 封裝： | 5 X 5 MM, 0.50 MM PITCH, PLASTIC, TFBGA-60 |
| 文件頁數(shù)： | 34/45頁 |
| 文件大?。?/td> | 3044K |
| 代理商： | S1R72V17B00A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
6. Functional Description
20
EPSON
S1R72V17*** Technical Manual (Rev.1.6)
6.2.2.4
Bulk/Interrupt IN Transactions
When the FIFO for an IN-direction bulk/interrupt endpoint has a quantity of data equivalent to Max.
packet size, or short packet transmission for that endpoint has been enabled by the firmware, the
LSI sends back a data packet in response to the IN transaction.
Transmission of short packets (including packets with data length of 0) is enabled by setting the
D_EP0ControlIN.EnShortPkt bit or D_EPx{x=a-e}Control.EnShortPkt bit. When transmitting short
packets, make sure that no new data will be written to the FIFO for the endpoint concerned before
the transaction is completed after packet transmission has been enabled.
For the endpoint EP0, when the IN transaction to transmit a short packet is completed, the
D_EP0ControlIN.ForceNAK bit is set.
When ACK is received in the IN transaction by which data was sent back to the host, the LSI
completes the transaction and issues an IN_TranACK status (D_EPx{x=0,
a-e}IntStat.IN_TranACK bit) to the firmware. It also updates the FIFO and assuming the
transmitted data to have been transmitted, frees the storage area.
If ACK is not received in the IN transaction by which data was sent back to the host, the LSI
assumes that the transaction has failed and issues an IN_TranErr status (D_EPx{x=0,
a-e}IntStat.IN_TranErr bit) to the firmware. It does not update the FIFO, nor does it free the storage
area.
When the FIFO does not have a quantity of data equivalent to the Max. packet size for an
IN-direction bulk/interrupt endpoint, or short packet transmission for that endpoint has not been
enabled by the firmware, the LSI responds with NAK for the IN transaction and issues
IN_TranNAK status (EPx{x=0, a-e}IntStat.IN_TranNAK bit) to the firmware. It does not update
the FIFO, and it does not free the storage area.
Fig. 6.3 shows how a Bulk or Interrupt IN transaction is performed in device mode in cases in
which the transaction is completed. In (a), the host issues an IN token addressed to the IN-direction
endpoint present in this node. In (b), if the LSI can respond to this IN transaction, it transmits a data
packet within Max. packet size. In (c), the host responds with ACK. When the LSI receives ACK, it
sets up the registers to be automatically set and issues a status to the firmware.
相關PDF資料 |
PDF描述 |
|---|---|
| S1R72V18B10 | UNIVERSAL SERIAL BUS CONTROLLER, PBGA121 |
| S1R72V27B05 | UNIVERSAL SERIAL BUS CONTROLLER, PBGA60 |
| S2024B-8 | 32-BIT, DSP-CROSSBAR SWITCH, PQFP196 |
| S2025A | 32-BIT, DSP-CROSSBAR SWITCH, PQFP196 |
| S2025C-15 | 32-BIT, DSP-CROSSBAR SWITCH, PQFP196 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| S1R72V17B00A20 | 制造商:Epson Electronics America Inc 功能描述:USB HS HOST/DEVICE CONTROLLER, |
| S1R72V18 | 制造商:EPSON 制造商全稱:EPSON 功能描述:Built-in pull-down resistor for downstream ports (no external circuit required) |
| S1R72V27 | 制造商:EPSON 制造商全稱:EPSON 功能描述:Built-in pull-down resistor for downstream ports (no external circuit required) |
| S1R77081F | 制造商:EPSON 制造商全稱:EPSON 功能描述:RSDS Transmitter/Receiver |
| S1R8ADMTBK | 制造商:Hubbell Wiring Device-Kellems 功能描述:S1R FRPT 8 ABANDONMENT PLATE |
發(fā)布緊急采購，3分鐘左右您將得到回復。