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參數(shù)資料
| 型號： | RM5261A |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| 中文描述： | RM5261A⑩微處理器與64位系統(tǒng)總線的數(shù)據(jù)資料的初步 |
| 文件頁數(shù)： | 29/42頁 |
| 文件大?。?/td> | 683K |
| 代理商： | RM5261A |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002240, Issue 2
29
RM5261A Microprocessor with 64-Bit System Bus Data Sheet
Preliminary
Table 9 Initialization Interface
Pin Name
BigEndian
Table 10 Power Supply
Note:
1.
An ‘*’ at the end of the signal name denotes active low.
Type
Input
Description
Allows the system to change the processor addressing mode without
rewriting the mode ROM.
Vcc is OK
When asserted, this signal indicates to the RM5261A that both power
supplies has been above the recommended value for more than 100
milliseconds and will remain stable. The assertion of VccOK initiates
the reading of the boot-time mode control serial stream.
Cold reset
This signal must be asserted for a power on reset or a cold reset.
ColdReset must be de-asserted synchronously with SysClock.
Reset
This signal must be asserted for any reset sequence. It may be
asserted synchronously or asynchronously for a cold reset, or
synchronously to initiate a warm reset. Reset must be de-asserted
synchronously with SysClock.
Boot mode clock
Serial boot-mode data clock output at the system clock frequency
divided by 256.
Boot mode data in
Serial boot-mode data input.
VccOK
Input
ColdReset*
Input
Reset*
Input
ModeClock
Output
ModeIn
Input
Pin Name
Type
Description
VccInt
VccIO
Vss
Input
Input
Input
Power supply for core.
Power supply for I/O.
Ground return.
相關(guān)PDF資料 |
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| RM5261A-250-H | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
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| RM5261A-300-HI | CONNECTOR ACCESSORY |
| RM5261A-350-H | CONNECTOR ACCESSORY |
| RM5261 | RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released |
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