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參數(shù)資料
| 型號(hào)： | RM5261A |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| 中文描述： | RM5261A⑩微處理器與64位系統(tǒng)總線的數(shù)據(jù)資料的初步 |
| 文件頁數(shù)： | 26/42頁 |
| 文件大?。?/td> | 683K |
| 代理商： | RM5261A |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002240, Issue 2
26
RM5261A Microprocessor with 64-Bit System Bus Data Sheet
Preliminary
3.32 Boot-Time Modes
The boot-time serial mode stream is defined in Table 4. Bit 0 is the bit presented to the processor
as the first bit in the stream when
VccOK
is asserted. Bit 255 is the last bit transferred.
Table 4 Boot-Time Mode Bit Stream
Mode
bit
Description
0
reserved (must be zero)
4:1
Write-back data rate
0: DDDD
1: DDxDDx
2: DDxxDDxx
3: DxDxDxDx
4: DDxxxDDxxx
5: DDxxxxDDxxxx
6: DxxDxxDxxDxx
7: DDxxxxxxDDxxxxxx
8: DxxxDxxxDxxxDxxx
9-15 reserved
7:5
Pclock to SysClock Multiplier
Mode Bits 7:5 Mode Bit 20=0 Mode Bit 20=1
000 Multiply by 2 n/a
001 Multiply by 3 n/a
010 Multiply by 4 n/a
011 Multiply by 5 Multiply by 2.5
100 Multiply by 6 n/a
101 Multiply by 7 Multiply by 3.5
110 Multiply by 8 n/a
111 Multiply by 9 Multiply by 4.5
8
Specifies byte ordering. Logically ORed with
BigEndian input signal.
0: Little endian
1: Big endian
10:9
Non-Block Write Protocol
00: R4000 compatible
01: reserved
10: pipelined
11: write re-issue
11
Timer Interrupt Enable/Disable
0: Enable the timer interrupt on
Int5*
1: Disable the timer interrupt on
Int5*
12
Reserved: Must be zero
14:13
Output driver strength - 100% = fastest
00: 67% strength
01: 50% strength
10: 100% strength
11: 83% strength
Mode
bit
15
17:16
Description
Reserved: Must be zero
System configuration identifiers -
software visible in Config[21..20]
register
19:18
Reserved: Must be zero
20
Select Pclock to SysClock Multiply
Mode
0: Integer Multipliers
1: Half-Integer Multipliers
External Bus Width
0: 64-bit
1: 32-bit
21
22
VccIO Setting
0: VccIO = 3.3V
1: VccIO = 2.5V
Reserved: Must be zero
255:23
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RM5261A-250-H | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| RM5261A-300-H | CONNECTOR ACCESSORY |
| RM5261A-300-HI | CONNECTOR ACCESSORY |
| RM5261A-350-H | CONNECTOR ACCESSORY |
| RM5261 | RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released |
相關(guān)代理商/技術(shù)參數(shù) |
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| RM5261A-300HI-B002 | 制造商:PMC Sierra from Components Direct 功能描述:MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHNOLOGY - Trays 制造商:PMC-Sierra 功能描述:PMC SIERRA RM5261A-300HI-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin MQFP |
| RM5261A-300J-B002 | 制造商:PMC Sierra from Components Direct 功能描述:RM5261A-300J-B002, MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHN - Trays 制造商:PMC SIERRA 功能描述:PMC SIERRA RM5261A-300J-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin LFMQFP |
| RM5270-150S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5270-200S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5271-200S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
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