參數(shù)資料
型號(hào)： RM5261A
廠商： PMC-Sierra, Inc.
英文描述： RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary
中文描述： RM5261A⑩微處理器與64位系統(tǒng)總線的數(shù)據(jù)資料的初步
文件頁(yè)數(shù)： 16/42頁(yè)
文件大小： 683K
代理商： RM5261A
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002240, Issue 2
16
RM5261A Microprocessor with 64-Bit System Bus Data Sheet
Preliminary
3.11 System Control Co-processor (CP0)
The system control coprocessor, also called coprocessor 0 or CP0 in the MIPS architecture, is
responsible for the virtual memory sub-system, the exception control system, and the diagnostics
capability of the processor. In the MIPS architecture, the system control co-processor (and thus the
kernel software) is implementation dependent.
The memory management unit controls the virtual memory system page mapping. It consists of an
instruction address translation buffer, ITLB, a data address translation buffer, DTLB, a Joint
instruction and data address translation buffer, JTLB, and co-processor registers used by the virtual
memory mapping sub-system.
3.12 System Control Co-Processor Registers
The RM5261A incorporates all system control co-processor (CP0) registers on-chip. These
registers provide the path through which the virtual memory system’s page mapping is examined
and modified, exceptions are handled, and operating modes are controlled (kernel vs. user mode,
interrupts enabled or disabled, cache features). In addition, the RM5261A includes registers to
implement a real-time cycle counting facility to aid in cache diagnostic testing and to assist in data
error detection.
Figure 4 shows the CP0 registers.
Figure 4 CP0 Registers
0
47
TLB
(entries protected
from TLBWR)
EntryHi
10*
EntryLo0
2*
EntryLo1
3*
PageMask
5*
Wired
6*
Random
1*
Index
0*
Status
12*
Cause
13*
EPC
14*
ErrorEPC
30*
Count
9*
Compare
11*
Context
4*
PRId
15*
Config
16*
TagHi
29*
TagLo
28*
ECC
26*
CacheErr
27*
BadVAddr
8*
LLAddr
17*
* Register number
XContext
20*
Used for memory
management
Used for exception
processing
相關(guān)PDF資料
PDF描述
RM5261A-250-H RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary
RM5261A-300-H CONNECTOR ACCESSORY
RM5261A-300-HI CONNECTOR ACCESSORY
RM5261A-350-H CONNECTOR ACCESSORY
RM5261 RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RM5261A-300HI-B002 制造商:PMC Sierra from Components Direct 功能描述:MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHNOLOGY - Trays 制造商:PMC-Sierra 功能描述:PMC SIERRA RM5261A-300HI-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin MQFP
RM5261A-300J-B002 制造商:PMC Sierra from Components Direct 功能描述:RM5261A-300J-B002, MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHN - Trays 制造商:PMC SIERRA 功能描述:PMC SIERRA RM5261A-300J-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin LFMQFP
RM5270-150S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor
RM5270-200S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor
RM5271-200S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*