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參數(shù)資料
| 型號： | RM5261 |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released |
| 中文描述： | RM5261⑩微處理器與64位系統(tǒng)總線的數(shù)據(jù)資料發(fā)布 |
| 文件頁數(shù)： | 17/40頁 |
| 文件大小： | 683K |
| 代理商： | RM5261 |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer
’
s Internal Use
Document ID: PMC-2002241, Issue 1
17
RM5261
Microprocessor with 64-Bit System Bus Data Sheet
Released
Figure 5 Kernel Mode Virtual Addressing (32-bit)
3.14 Joint TLB
For fast virtual-to-physical address translation, the RM5261 uses a large, fully associative TLB
that maps 96 virtual pages to their corresponding physical addresses. As indicated by its name, the
joint TLB (JTLB) is used for both instruction and data translations. The JTLB is organized as 48
pairs of even-odd entries, and maps a virtual address and address space identifier into the large, 64
GB physical address space.
Two mechanisms are provided to assist in controlling the amount of mapped space and the
replacement characteristics of various memory regions. First, the page size can be configured, on a
per-entry basis, to use page sizes in the range of 4 KB to 16 MB (in multiples of 4). The CP0 Page
Mask register is loaded with the desired page size of a mapping, and that size is stored into the
TLB along with the virtual address when a new entry is written. Thus, operating systems can
create special purpose maps; for example, an entire frame buffer can be memory mapped using
only one TLB entry.
The second mechanism controls the replacement algorithm when a TLB miss occurs. The
RM5261 provides a random replacement algorithm to select a TLB entry to be written with a new
mapping; however, the processor also provides a mechanism whereby a system specific number of
mappings can be locked into the TLB, thereby avoiding random replacement. This mechanism
allows the operating system to guarantee that certain pages are always mapped for performance
0xFFFFFFFF
Kernel virtual address space
(kseg3)
Mapped, 0.5GB
0xE0000000
0xDFFFFFFF
Supervisor virtual address space
(ksseg)
Mapped, 0.5GB
0xC0000000
0xBFFFFFFF
Uncached kernel physical address space
(kseg1)
Unmapped, 0.5GB
0xA0000000
0x9FFFFFFF
Cached kernel physical address space
(kseg0)
Unmapped, 0.5GB
0x80000000
0x7FFFFFFF
User virtual address space
(kuseg)
Mapped, 2.0GB
0x00000000
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| RM5261-250Q-C001 | 制造商:PMC Sierra from Components Direct 功能描述:RM5261-250Q-C001, MICROPROCESSOR 64-BIT 0.25 UM CMOS TECHNOL - Trays 制造商:PMC-Sierra 功能描述:PMC SIERRA RM5261-250Q-C001, Microprocessor 64-Bit 0.25 um CMOS Technology 3.3V 208-Pin PQFP |
| RM5261-266Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
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