參數(shù)資料
型號: QL6250E-8PQ208I
廠商: QUICKLOGIC CORP
元件分類: FPGA
英文描述: FPGA, 960 CLBS, 248160 GATES, PQFP208
封裝: 28 X 28 MM, 3.35 MM HEIGHT, MS-028, PLASTIC, QFP-208
文件頁數(shù): 3/64頁
文件大?。?/td> 850K
代理商: QL6250E-8PQ208I
2006 QuickLogic Corporation
Eclipse-E Family Data Sheet Rev. A
11
Programmable Slew Rate
Each I/O has programmable slew rate capability—the slew rate can be either fast or slow. The slower rate can
be used to reduce the switching times of each I/O.
Programmable Weak Pull-Down
A programmable Weak Pull-Down resistor is available on each I/O. The I/O Weak Pull-Down eliminates the
need for external pull down resistors for used I/Os as shown in Figure 9. The spec for pull-down current is
maximum of 150
μA under worst case condition.
Figure 9: Programmable I/O Weak Pull-Down
I/O Output Logic
PAD
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