參數(shù)資料
型號: PUMA2F16006MB-120E
元件分類: PROM
英文描述: 512K X 32 FLASH 5V PROM MODULE, 120 ns, CHMA66
封裝: CERAMIC, PGA-66
文件頁數(shù): 8/26頁
文件大?。?/td> 258K
代理商: PUMA2F16006MB-120E
Issue 5.1 May 2001
PAGE 16
After the Chip Erase operation has completed the memory will return to
the Read Mode, unless an error has occurred. When an error occurs the
memory will continue to output the Status Register. A Read/Reset
command must be issued to reset the error condition and return to Read
Mode.
The Chip Erase Command sets all of the bits in unprotected blocks of the
memory to ’1’. All previous data is lost.
Block Erase Command
The Block Erase command can be used to erase a list of one or more
blocks. Six Bus Write operations are required to select the first block in
the list. Each additional block in the list can be selected by repeating the
sixth Bus Write operation using the address of the additional block. The
Block Erase operation starts the Program/Erase Controller about 50
s
after the last Bus Write operation. Once the Program/Erase Controller
starts it is not possible to select any more blocks. Each additional block
must therefore be selected within 50
s of the last block. The 50s timer
restarts when an additional block is selected. The Status Register can
be read after the sixth Bus Write operation. See the Status Register for
details on how to identify if the Program/Erase Controller has started the
Block Erase operation.
If any selected blocks are protected then these are ignored and all the
other selected blocks are erased. If all of the selected blocks are
protected the Block Erase operation appears to start but will terminate
within about 100
s, leaving the data unchanged. No error condition is
given when protected blocks are ignored.
During the Block Erase operation the memory will ignore all commands
except the Erase Suspend and Read/Reset commands. Typical block
erase times are given in Table 5. All Bus Read operations during the
Block Erase operation will output the Status Register on the Data Inputs/
Outputs. See the section on the Status Register for more details.
After the Block Erase operation has completed the memory will return to
the Read Mode, unless an error has occurred. When an error occurs the
memory will continue to output the Status Register. A Read/Reset
command must be issued to re-set the error condition and return to Read
mode.
The Block Erase Command sets all of the bits in the unprotected
selected blocks to ’1’. All previous data in the selected blocks is lost.
Erase Suspend Command
The Erase Suspend Command may be used to temporarily suspend a
Block Erase operation and return the memory to Read mode. The The
Program/Erase Controller will suspend within 15
s of the Erase
Suspend Command being issued. Once the Program/Erase Controller
has stopped the memory will be set to Read mode and the Erase will be
suspended. If the Erase Suspend command is issued during the period
when the memory is waiting for an additional block (before the Program/
Erase Controller starts) then the Erase is suspended immediately and
will start immediately when the Erase Resume Command is issued. It
will not be possible to select any further blocks for erasure after the Erase
Resume.
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