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參數(shù)資料
| 型號： | PUMA2F16006MB-120E |
| 元件分類： | PROM |
| 英文描述： | 512K X 32 FLASH 5V PROM MODULE, 120 ns, CHMA66 |
| 封裝： | CERAMIC, PGA-66 |
| 文件頁數(shù)： | 11/26頁 |
| 文件大?。?/td> | 258K |
| 代理商： | PUMA2F16006MB-120E |
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Issue 5.1 May 2001
PAGE 19
Note that the Program command cannot change a bit set at ’0’ back to
’1’ and attempting to do so willcause an error. One of the Erase
commands must be used to set all the bits in a block or in the whole
memory from ’0’ to ’1’.
Erase Timer Bit (D3)
The Erase Timer Bit can be used to identify the start of Program/Erase
Controller operation during a Block Erase command. Once the Program/
Erase Controller starts erasing the Erase Timer Bit is set to ’1’. Before
the Program/Erase Controller starts the Erase Timer Bit is set to ’0’ and
additional blocks to be erased may be written to the Command Interface.
The Erase Timer Bit is output on D3 when the Status Register is read.
Alternative Toggle Bit (D2)
The Alternative Toggle Bit can be used to monitor the Program/Erase
controller during Erase operations. The Alternative Toggle Bit is output
on D2 when the Status Register is read.
During Chip Erase and Block Erase operations the Toggle Bit changes
from ’0’ to ’1’ to ’0’, etc., with successive Bus Read operations from
addresses within the blocks being erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle Bit changes from ’0’ to ’1’
to ’0’, etc. with successive Bus Read operations from addresses within
the blocks being erased. Bus Read operations to addresses within
blocks not being erased will output the memory cell data as if in Read
mode. After an Erase operation that causes the Error Bit to be set the
Alternative Toggle Bit can be used to identify which block or blocks have
caused the error. The Alternative Toggle Bit changes from ’0’ to ’1’ to ’0’,
etc. with successive Bus Read Operations from addresses within blocks
that have not erased correctly. The Alternative Toggle Bit does not
change if the addressed block has erased correctly.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PUMA2F16006BI-120E | 512K X 32 FLASH 5V PROM MODULE, 120 ns, CHMA66 |
| PUMA68S16000ABM-020 | 512K X 32 MULTI DEVICE SRAM MODULE, 20 ns, PQCC68 |
| PUMA68S16000XB-015 | 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQMA68 |
| PUMA68S4000/A-45 | 128K X 32 MULTI DEVICE SRAM MODULE, 45 ns, QMA68 |
| PV54-150-FREQ | VCXO, CLOCK, 30 MHz - 167 MHz, PECL OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PUMA2F16006MB-12E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM|FLASH|512KX32|HYBRID|PGA|66PIN|CERAMIC |
| PUMA2F16006MB-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 Flash EEPROM Module |
| PUMA2F16006MB-15E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 Flash EEPROM Module |
| PUMA2F16006MB-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| PUMA2F16006MB-70E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
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