參數(shù)資料
型號(hào)： PSD413A1F
英文描述： Field Programmable Microcontroller Peripherals with Flash Memory(可編程邏輯，16K位SRAM,35個(gè)可編程I/O,通用PLD有59個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備與快閃記憶體（可編程邏輯，16K的位的SRAM，35余個(gè)可編程輸入/輸出，通用PLD的有59個(gè)輸入）
文件頁(yè)數(shù)： 63/98頁(yè)
文件大小： 365K
代理商： PSD413A1F
PSD413F Family
6-63
ADVANCE INFORMATION
System
Configuration
The CSIOP signal, which is generated by the DPLD, selects the internal I/O devices or
registers. The CSIOP signal takes up 256 bytes of address space and is defined by the
user in the PSDSoft Software. The following is an address offset map for the various
devices relative to the CSIOP base address.
Register
Name
Address
Offset
Register
Name
Address
Offset
PAGE REGISTER
PMMR0
E0
B0
PMMR1
B1
Table 18. Register Address Offset
The following table is the address map offset of the I/O port registers.
Table 19. I/O Register Address Offset
Address Offset
Port C
Register Name
Port A
Port B
Port D
Port E
Data In
Control
Data Out
Direction
Open Drain
PLD – I/O
00
02
04
06
01
03
05
07
10
12
14
16
18
11
13
15
17
19
20
22
24
26
0A
0B
2A
2C
Macrocell Out
0C
0D
(PSD413A2F)
Register Name
Register Function
Data In
This Register is used to read the inputs on the port pins.
Control
A
“
0
”
sets the corresponding port pin in Address Out Mode.
A
“
1
”
sets the pin in MCU I/O Mode.
Data Out
Holds the output data in the MCU I/O Mode.
This register is used to control the data flow in the I/O ports.
A
“
0
”
sets the corresponding pin as an input pin.
A
“
1
”
sets the pin as an output pin.
Direction
Open Drain
A
“
0
”
sets the corresponding pin driver as a CMOS driver.
A
“
1
”
sets the pin driver as an Open Drain Driver.
PLD – I/O
A read only status register; a
“
1
”
indicates the corresponding pin
is configured as a PLD pin.
Macrocell Out
This register holds the outputs of the GPLD macrocells.
Page Register
A 4-bit register that supports paging.
PMMR0
PMMR1
Power management registers; enables the PSD4XX Power Down
Mode and other power saving configurations.
Table 20. Register Function
相關(guān)PDF資料
PDF描述
PSD413F Field Programmable Microcontroller Peripherals with Flash Memory(可編程邏輯，16K位SRAM,35個(gè)可編程I/O,通用PLD有59個(gè)輸入)
PSD413A2F Field Programmable Microcontroller Peripherals with Flash Memory(可編程邏輯，16K位SRAM,35個(gè)可編程I/O,通用PLD有59個(gè)輸入)
PSD4235G2(中文) Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的閃速在系統(tǒng)可編程外圍芯片)
PSD4235G2 Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的閃速在系統(tǒng)可編程外圍芯片)
PSD4235G2 FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERALS FOR 16-BIT MCUS (5V SUPPLY)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD413A2-C-70L 制造商:WSI 功能描述:
PSD4-16 制造商:Tamura Corporation of America 功能描述:
PSD4-20 制造商:MICROTRAN 功能描述:POWER TRANSFORMER, 6 VA
PSD4235G2-70U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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