參數(shù)資料
型號: PPC440GX-3CF400C
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 440GX Embedded Processor
中文描述: 32-BIT, 400 MHz, RISC PROCESSOR, CBGA552
封裝: 25 X 25 MM, CERAMIC, FBGA-552
文件頁數(shù): 80/93頁
文件大?。?/td> 794K
代理商: PPC440GX-3CF400C
440GX – Power PC 440GX Embedded Processor
80
AMCC
Revision 1.15 – August 30, 2007
Data Sheet
DDR SDRAM Write Operation
The following diagram illustrates the relationship among the signals involved with a DDR write operation.
DDR SDRAM Write Cycle Timing
DQS
MemData
PLB Clk
MemClkOut0
MemClkOut0(90)
Addr/Cmd
T
SK
T
SA
T
HA
T
DS
T
DS
T
SD
T
HD
T
SD
T
HD
T
SA
= Setup time for address and command signals to MemClkOut0(90)
T
HA
= Hold time for address and command signals from MemClkOut0(90)
T
SD
= Setup time for data signals (minimum time data is valid
before
rising/falling edge of DSQ)
T
HD
= Hold time for data signals (minimum time data is valid
after
rising/falling edge of DSQ)
T
SK
= Delay from rising edge of MemClkOut0(0) to rising/falling edge of signal (skew)
T
DS
= Delay from rising/falling edge of clock to the rising/falling edge of DQS
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