參數(shù)資料
型號(hào): PPC440GX-3CF400C
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 440GX Embedded Processor
中文描述: 32-BIT, 400 MHz, RISC PROCESSOR, CBGA552
封裝: 25 X 25 MM, CERAMIC, FBGA-552
文件頁(yè)數(shù): 63/93頁(yè)
文件大小: 794K
代理商: PPC440GX-3CF400C
440GX – Power PC 440GX Embedded Processor
AMCC
63
Revision 1.15 – August 30, 2007
Data Sheet
Test Conditions
Clock timing and switching characteristics are specified in accordance with operating
conditions shown in the table “Recommended DC Operating Conditions.” AC
specifications are characterized with V
DD
= 1.5V, T
C
= +85°C and a 10pF test load as
shown in the figure to the right.
DC Power Supply Loads
Parameter
Symbol
Frequency (MHz)
Typical
Maximum
Unit
Notes
V
DD
active operating current
I
DD
533
1.37
1.69
A
2
667
1.49
1.8
A
2
800
1.77
2.2
A
2, 3
OV
DD
active operating current
I
ODD
533
58
111
mA
2
667
58
111
mA
2
800
58
111
mA
2, 3
SV
DD
active operating current
I
SDD
533
544
749
mA
2
667
568
837
mA
2
800
680
940
mA
2, 3
AxV
DD
input current
I
ADD
33
mA
1, 2
Notes:
1. See “Absolute Maximum Ratings” on page 58 for filter recommendations.
2. The maximum current values listed above are not guaranteed to be the highest obtainable. These values are dependent on many factors
including the type of applications running, clock rates, use of internal functional capabilities, external interface usage, case temperature,
and the power supply voltages. Your specific application can produce significantly different results. V
DD
(logic) current and power are
primarily dependent on the applications running and the use of internal chip functions (DMA, PCI, Ethernet, and so on). OV
DD
(I/O)
current and power are primarily dependent on the capacitive loading, frequency, and utilization of the external buses. The following
information provides details about the conditions under which the listed values were obtained:
a. In general, the values are measured using a PPC440GX Evaluation Board set for Ethernet mode 4, PCI-X running at 100MHz with
an Intel Pro 1000, an Agilent Test card, an EBMI test card, a UART wrap plug, and one 128MB Micron DIMM while running
applications designed to maximize CPU power consumption. An external PCI master heavily loads the PCI bus with transfers
targeting SDRAM, while the internal DMA controller further increases SDRAM bus traffic.
System clock rates are set as follows: SysClk = 33MHz, CPU = 667MHz, PLB = 167MHz, and OPB = EBC = 83MHz.
b. Typical current is characterized at V
DD
= +1.5V, OV
DD
= +3.3V, SV
DD
= +2.5V, and T
C
= +47
°
C.
c. Maximum current is characterized at V
DD
= +1.6V, OV
DD
= +3.6V, SV
DD
= +2.7V, and T
C
= +85
°
C.
3. Estimated values.
Output
Pin
10pF
C
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