參數(shù)資料
型號(hào)： PPC440EPx-SpAfffTs
廠商： Applied Micro Circuits Corp.
英文描述： PowerPC 440EPx Embedded Processor
中文描述： 嵌入式處理器的PowerPC 440EPx
文件頁數(shù)： 59/94頁
文件大小： 738K
代理商： PPC440EPX-SPAFFFTS
440EPx – PPC440EPx Embedded Processor
Revision 1.26 – October 15, 2007
Preliminary Data Sheet
AMCC Proprietary
59
Ethernet Interface
GMCRxD0:1,
GMC0RxD0:1,
SMII0:1RxD
GMII/MII: Receive data.
RGMII 0: Receive data.
SMII 0:1: Receive data.
I
3.3 V tolerant
2.5 V CMOS
1
GMCRxD2:3
GMC0RxD2:3
GMII/MII: Receive data.
RGMII 0: Receive data.
I
3.3 V tolerant
2.5 V CMOS
1
GMCRxD4:7,
GMC1RxD0:3
GMII/MII: Receive data.
RGMII 1: Receive data.
I
3.3 V tolerant
2.5 V CMOS
1
GMCTxD0:1,
GMC0TxD0:1,
SMII0:1TxD
GMII/MII: Transmit data.
RGMII 0: Transmit data.
SMII 0:1: Transmit data.
O
3.3 V tolerant
2.5 V CMOS
GMCTxD2:3,
GMC0TxD2:3
GMII/MII: Transmit data.
RGMII 0: Transmit data.
O
3.3 V tolerant
2.5 V CMOS
1
GMCTxD4:7,
GMC1TxD0:3
GMII/MII: Transmit data.
RGMII 1: Transmit data.
O
3.3 V tolerant
2.5 V CMOS
1
GMCRxEr,
GMC1RxCtl
GMII/MII: Receive error.
RGMII 1: Receive control.
I
3.3 V tolerant
2.5 V CMOS
1
GMCRxClk,
GMC0RxClk,
SMIISync
GMII/MII: Receive clock.
RGMII 0: Receive clock.
SMII: Synchronizing signal.
I
3.3 V tolerant
2.5 V CMOS
1, 5
GMCRxDV,
GMC0RxCtl
GMII/MII: Receive data valid.
RGMII 0: Receive control.
I
3.3 V tolerant
2.5 V CMOS
1
GMCCrS,
GMC1TxClk
GMII/MII: Carrier sense.
RGMII 1: Transmit clock.
I/O
3.3 V tolerant
2.5 V CMOS
1
GMCTxEr,
GMC1TxCtl
GMII/MII: Transmit error.
RGMII 1: Transmit control.
O
3.3 V tolerant
2.5 V CMOS
GMCTxEn,
GMC0TxCtl
GMII/MII: Transmit enable.
RGMII 0: Transmit control.
O
3.3 V tolerant
2.5 V CMOS
GMCTxClk
MII: Transmit clock for MII.
O
3.3 V tolerant
2.5 V CMOS
1, 5
GMCCD,
GMC1RxClk
GMII/MII: Collision detect.
RGMII 1: Receive clock.
I
3.3 V tolerant
2.5 V CMOS
1, 5
GMCMDClk
Management data clock
O
3.3 V tolerant
2.5 V CMOS
GMCMDIO
Management data I/O
I/O
3.3 V tolerant
2.5 V CMOS
GMCGTxClk,
GMC0TxClk
GMII: Transmit clock for GMII.
RGMII 0: Transmit clock.
O
3.3 V tolerant
2.5 V CMOS
GMCRefClk,
SMIIRefClk
GMII, RGMII: Reference clock.
SMII: Reference clock.
I
3.3 V tolerant
2.5V CMOS
Rcvr
1, 5
RejectPkt0:1
External request to reject a packet.
I
3.3 V tolerant
2.5V CMOS
1, 5
Table 8. Signal Functional Description (Sheet 3 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3 k
Ω
to OV
DD
(EOV
DD
for Ethernet)
3. Must pull down (recommended value is 1 k
Ω
)
4. If not used, must pull up (recommended value is 3 k
Ω
to OV
DD
(EOV
DD
for Ethernet)
5. If not used, must pull down (recommended value is 1 k
Ω
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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PPC440EPX-STA400E 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 667 MHZ, 2 10/100/1000 ETHERNET, - Trays
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PPC440EPX-STA533E 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 667 MHZ, 2 10/100/1000 ETHERNET, - Trays
PPC440EPX-STA533EZ 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 667 MHZ, 2 10/100/1000 ETHERNET, - Tape and Reel
PPC440EPX-STA667E 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 667 MHZ, 2 10/100/1000 ETHERNET, - Trays
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