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參數(shù)資料
| 型號： | PP155 |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 18/31頁 |
| 文件大?。?/td> | 600K |
| 代理商： | PP155 |
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18
Altera Corporation
Specifications
PPP Packet Processor 155 Mbps MegaCore Function (PP155) User Guide
Performance
Table2
shows the required speed and estimated gate count of PP155 in an
APEX 20KE device.
Note:
(1)
The numbers for the LEs and ESBs are approximate as of Dec. 13, 2000.
Software
Interface
Memory Map
All addresses access 16-bit registers and are shown as hexadecimal values.
The value is the byte address, thus bit 0 is not used. All addresses are even.
Table 2. Performance
Note (1)
LEs
ESBs
f
MAX
(MHz)
1,251
0
19.44 required to support 155.52 Mbps
Address
Register
Description
’
h00
’
h02
RX_CTRL
Receive Control Register
RX_IS
Receive Interrupt Register
’
h04
RX_IE
Receive Interrupt Enable Register
’
h06
RX_PM_GOOD
Receive Good Packet Count
’
h08
RX_PM_FCS
Receive FCS Error Count
’
h0A
RX_PM_ABORT
Receive Abort Count
’
h0C
RX_PM_RUNT
Receive Runt Frame Count
’
h10
’
h12
TX_CTRL
Transmit Control Register
TX_IS
Transmit Interrupt Register
’
h14
TX_IE
Transmit Interrupt Enable Register
’
h16
TX_PM_GOOD
Transmit Good Packet Count
’
h18
TX_PM_ERR
Transmit Error Packet Count
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