參數(shù)資料
型號(hào)： PP155
英文描述： Telecommunication IC
中文描述： 通信集成電路
文件頁(yè)數(shù)： 13/31頁(yè)
文件大?。?/td> 600K
代理商： PP155
Altera Corporation
13
PPP Packet Processor 155 Mbps MegaCore Function (PP155) User Guide
Specifications
S
1
Symptoms of misalignment are:
I
Extremely long packets: They typically occur during line idle, when
the bus is normally carrying flags. The flags no longer look like flags,
but like packet data. In the above example, the flags are converted
into 10011111.
Excessive error rate: Random data patterns may, when shifted,
masquerade as flags and hence mark the start and stop of packets.
This is likely to cause FCS errors and, less likely, runts or aborts.
I
If it detects a misalignment, the aligner reassembles the data to
compensate. This function is enabled via the Receive Control Register.
Descrambling
The receive frame and between-frame flags are descrambled using a self-
synchronizing descrambler. The generator polynomial used is the
standard x
43
+1. Descrambling can be enabled or disabled via the Receive
Control Register. The inter-frame fill is then discarded, and the frame is
forwarded for processing.
Processing
Processing involves taking the descrambled frame, detecting the start of
frame and end of frame indicated by flags, and removing the stuff octets
(control escape characters). Aborted frames are also detected.
FCS 16/32
The FCS 16/ 32 blocks check for errors by calculating a syndrome, and by
using either the CRC-16 (x
16
+ x
12
+ x
5
+1) or CRC-32 (x
32
+ x
26
+ x
23
+ x
22
+
x
16
+ x
12
+ x
11
+ x
10
+ x
8
+ x
7
+ x
5
+ x
4
+ x
2
+ x +1) generator polynomial as an
FCS. All packets
—
good packets, packets with CRC errors, aborted
packets, and runt packets
—
are counted in statistics registers.
FCS Deletion
FCS Deletion removes the FCS from the frame. Removal of the FCS is
enabled or disabled via the Receive Control Register. The frame is then
passed to the Atlantic interface.
Transmitter Description
The PP155 takes in packets from the Atlantic interface via the TXFIFO, and
passes them to the TXHDLC block for processing.
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