![](http://datasheet.mmic.net.cn/330000/PM7366_datasheet_16444405/PM7366_39.png)
RELEASED
DATA SHEET
PM7366 FREEDM-8
ISSUE 4
PMC-1970930
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
26
Pin No.
Pin Name
Type
-PI
-BI
Function
TA[11]/TRS
Input
B12
C9
The test register select signal (TA[11]/TRS) selects
between normal and test mode register accesses
during production test (PMCTEST set high). TRS is
set high to select test registers and is set low to select
normal registers.
In normal operation (PMCTEST set low), TA[11]/ TRS
should be tied high.
TRDB
Input
D12
D9
The test mode read enable signal (TRDB) is set low
during FREEDM-8 register read accesses during
production test (PMCTEST set high). The FREEDM-
8 drives the test data bus (TDAT[15:0]) with the
contents of the addressed register while TRDB is low.
In normal operation (PMCTEST set low), TRDB
should be tied high.
TWRB
Input
B13
C8
The test mode write enable signal (TWRB) is set low
during FREEDM-8 register write accesses during
production test (PMCTEST set high). The contents of
the test data bus (TDAT[15:0]) are clocked into the
addressed register on the rising edge of TWRB.
In normal operation (PMCTEST set low), TWRB
should be tied high.
TDAT[0]
TDAT[1]
TDAT[2]
TDAT[3]
TDAT[4]
TDAT[5]
TDAT[6]
TDAT[7]
TDAT[8]
TDAT[9]
TDAT[10]
TDAT[11]
TDAT[12]
TDAT[13]
TDAT[14]
TDAT[15]
I/O
V6
W6
V7
Y7
W8
U9
W9
W10
Y10
W11
U11
W12
U12
W13
Y14
Y15
Y16
W15
V14
W14
V13
U12
V12
W11
Y10
V10
Y9
V9
U9
Y7
U8
Y6
The bi-directional test mode data bus (TDAT[15:0])
carries data read from or written to FREEDM-8
registers during production test.
In normal operation (PMCTEST set low), TDAT[15:0]
should be left unconnected.