
PIC18FXX20
DS39580A-page 344
Advance Information
2001 Microchip Technology Inc.
MOVF
.......................................................................275
MOVFF
.....................................................................276
MOVLB
.....................................................................276
MOVLW
....................................................................277
MOVWF
...................................................................277
MULLW
....................................................................278
MULWF
....................................................................278
NEGF
.......................................................................279
NOP
.........................................................................279
POP
..........................................................................280
PUSH
.......................................................................280
RCALL
......................................................................281
RESET
.....................................................................281
RETFIE
....................................................................282
RETLW
.....................................................................282
RETURN
..................................................................283
RLCF
........................................................................283
RLNCF
.....................................................................284
RRCF
.......................................................................284
RRNCF
.....................................................................285
SETF
........................................................................285
SLEEP
......................................................................286
SUBFWB
..................................................................286
SUBLW
....................................................................287
SUBWF
....................................................................287
SUBWFB
..................................................................288
SWAPF
....................................................................288
TBLRD
.....................................................................289
TBLWT
.....................................................................290
TSTFSZ
....................................................................291
XORLW
....................................................................291
XORWF
....................................................................292
Summary Table
........................................................254
INT Interrupt (RB0/INT). SeeInterrupt Sources.
INTCON Registers
.............................................................85
Inter-Integrated Circuit. SeeI
2
C.
Interrupt Sources
..............................................................233
A/D Conversion Complete
........................................211
Capture Complete (CCP)
.........................................145
Compare Complete (CCP)
.......................................146
INT0
...........................................................................98
Interrupt-on-Change (RB7:RB4)
..............................102
PORTB, Interrupt-on-Change
....................................98
RB0/INT Pin, External
................................................98
TMR0
.........................................................................98
TMR0 Overflow
........................................................129
TMR1 Overflow
................................................ 131
,
133
TMR2 to PR2 Match
.................................................136
TMR2 to PR2 Match (PWM)
............................ 135
,
148
TMR3 Overflow
................................................ 137
,
139
TMR4 to PR4 Match
.................................................142
TMR4 to PR4 Match (PWM)
....................................141
Interrupts
............................................................................83
Control Registers
.......................................................85
Enable Registers
........................................................91
Flag Registers
............................................................88
Logic
...........................................................................84
Priority Registers
........................................................94
Reset Control Registers
.............................................97
IORLW
.............................................................................274
IORWF
.............................................................................274
IPR Registers
.....................................................................94
K
K
EE
L
OQ
Evaluation and Programming Tools
...................296
L
LFSR
................................................................................ 275
Low Voltage Detect
.......................................................... 227
Characteristics
......................................................... 307
Converter Characteristics
........................................ 307
Effects of a RESET
.................................................. 231
Operation
................................................................. 230
Current Consumption
....................................... 231
During SLEEP
................................................. 231
Reference Voltage Set Point
........................... 231
Typical Application
................................................... 227
Low Voltage ICSP Programming
..................................... 250
LVD. SeeLow Voltage Detect.
M
Master SSP (MSSP) Module Overview
........................... 151
Master Synchronous Serial Port (MSSP). SeeMSSP.
Master Synchronous Serial Port. SeeMSSP
Memory
Mode Memory Access
............................................... 40
Memory Maps for PIC18F8X20 Program
Memory Modes
.......................................................... 41
Memory Organization
Data Memory
............................................................. 47
PIC18F8X20 Program Memory Modes
...................... 39
Program Memory
....................................................... 39
Memory Programming Requirements
.............................. 308
Microcontroller Mode
......................................................... 71
Microprocessor Mode
........................................................ 71
Microprocessor with Boot Block Mode
............................... 71
Migration from High-End to Enhanced Devices
............... 339
Migration from Mid-Range to Enhanced Devices
............ 338
MOVF
.............................................................................. 275
MOVFF
............................................................................ 276
MOVLB
............................................................................ 276
MOVLW
........................................................................... 277
MOVWF
........................................................................... 277
MPLAB C17 and MPLAB C18 C Compilers
..................... 293
MPLAB ICD In-Circuit Debugger
..................................... 295
MPLAB ICE High Performance Universal In-Circuit
Emulator with MPLAB IDE
....................................... 294
MPLAB Integrated Development
Environment Software
............................................. 293
MPLINK Object Linker/MPLIB Object Librarian
............... 294
MSSP
............................................................................... 151
ACK Pulse
........................................................164
,
165
Clock Stretching
....................................................... 170
10-bit Slave Receive Mode (SEN = 1)
............. 170
10-bit Slave Transmit Mode
............................. 170
7-bit Slave Receive Mode (SEN = 1)
............... 170
7-bit Slave Transmit Mode
............................... 170
Clock Synchronization and the CKP bit
(SEN = 1)
......................................................... 171
Control Registers (General)
..................................... 151
Enabling SPI I/O
...................................................... 155
I
2
C Mode
.................................................................. 160
Acknowledge Sequence Timing
...................... 184
Baud Rate Generator
...................................... 177
Bus Collision
During a Repeated START
Condition
................................. 188
Bus Collision During a START
Condition
................................................. 186
Bus Collision During a STOP Condition
.......... 189
Clock Arbitration
.............................................. 178
Effect of a RESET
........................................... 185