參數(shù)資料
型號(hào): PIC18F46J50-I/PT
廠商: Microchip Technology
文件頁數(shù): 134/164頁
文件大小: 0K
描述: IC PIC MCU FLASH 64KB 44-TQFP
產(chǎn)品培訓(xùn)模塊: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
PIC18F MPLAB® Starter Kit
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 160
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲(chǔ)器容量: 64KB(32K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2.15 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 657 (CN2011-ZH PDF)
配用: AC164330-ND - MODULE SKT FOR 44TQFP 18F45J10
2011 Microchip Technology Inc.
DS39931D-page 71
PIC18F46J50 FAMILY
PSTR1CON
PIC18F2XJ50
PIC18F4XJ50
00-0 0001
uu-u uuuu
ECCP1AS
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
ECCP1DEL
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
CCPR1H
PIC18F2XJ50
PIC18F4XJ50
xxxx xxxx
uuuu uuuu
CCPR1L
PIC18F2XJ50
PIC18F4XJ50
xxxx xxxx
uuuu uuuu
CCP1CON
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
PSTR2CON
PIC18F2XJ50
PIC18F4XJ50
00-0 0001
uu-u uuuu
ECCP2AS
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
ECCP2DEL
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
CCPR2H
PIC18F2XJ50
PIC18F4XJ50
xxxx xxxx
uuuu uuuu
CCPR2L
PIC18F2XJ50
PIC18F4XJ50
xxxx xxxx
uuuu uuuu
CCP2CON
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
CTMUCONH
PIC18F2XJ50
PIC18F4XJ50
0-00 000-
u-uu uuu-
CTMUCONL
PIC18F2XJ50
PIC18F4XJ50
0000 00xx
uuuu uuuu
CTMUICON
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
SPBRG1
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
RCREG1
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
TXREG1
PIC18F2XJ50
PIC18F4XJ50
xxxx xxxx
0000 0000
uuuu uuuu
TXSTA1
PIC18F2XJ50
PIC18F4XJ50
0000 0010
uuuu uuuu
RCSTA1
PIC18F2XJ50
PIC18F4XJ50
0000 000x
uuuu uuuu
SPBRG2
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
RCREG2
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
TXREG2
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
TXSTA2
PIC18F2XJ50
PIC18F4XJ50
0000 0010
uuuu uuuu
EECON2
PIC18F2XJ50
PIC18F4XJ50
---- ----
EECON1
PIC18F2XJ50
PIC18F4XJ50
--00 x00-
--00 q00-
--00 u00-
IPR3
PIC18F2XJ50
PIC18F4XJ50
1111 1111
uuuu uuuu
PIR3
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu(3)
PIE3
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
IPR2
PIC18F2XJ50
PIC18F4XJ50
1111 1111
uuuu uuuu
PIR2
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu(3)
PIE2
PIC18F2XJ50
PIC18F4XJ50
0000 0000
uuuu uuuu
TABLE 5-2:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset,
Wake From Deep
Sleep
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
CM Resets
Wake-up via WDT
or Interrupt
Legend: u
= unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
When the wake-up is due to an interrupt and the GIEH (and GIEL if low priority) bit(s) are set, the TOSU,
TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the
next location in the hardware stack.
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4:
See Table 5-1 for Reset value for specific condition.
5:
Not implemented on PIC18F2XJ50 devices.
6:
Not implemented on “LF” devices.
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