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PIC18F1230/1330
DS39758B-page 304
Advance Information
2006 Microchip Technology Inc.
PWM Dead Time
Decrementing the Counter .......................................130
Distortion ..................................................................131
Generators ...............................................................129
Insertion ...................................................................129
Ranges .....................................................................130
PWM Duty Cycle ..............................................................125
Center-Aligned .........................................................127
Complementary Operation .......................................128
Edge-Aligned ...........................................................126
Register Buffers .......................................................126
Registers ..................................................................125
PWM Output Override ......................................................132
Complementary Mode ..............................................132
Examples .................................................................134
Synchronization .......................................................132
PWM Period .....................................................................123
PWM Time Base ..............................................................114
Continuous Up/Down Count Modes .........................119
Free-Running Mode .................................................119
Interrupts ..................................................................119
In Continuous Up/Down Count Mode ..............120
In Double Update Mode ...................................122
In Free-Running Mode .....................................119
In Single-Shot Mode ........................................120
Postscaler ................................................................119
Prescaler ..................................................................119
Single-Shot Mode ....................................................119
R
RAM. See Data Memory.
RBIF Bit ..............................................................................84
RC Oscillator ......................................................................17
RCIO Oscillator Mode ................................................17
RC_IDLE Mode ..................................................................31
RC_RUN Mode ..................................................................27
RCALL ..............................................................................238
RCON Register
Bit Status During Initialization ....................................40
Reader Response ............................................................308
Register File Summary .................................................55–57
Registers
ADCON0 (A/D Control 0) .........................................164
ADCON1 (A/D Control 1) .........................................165
ADCON2 (A/D Control 2) .........................................166
BAUDCON (Baud Rate Control) ..............................144
CMCON (Comparator Control) ................................174
CONFIG1H (Configuration 1 High) ..........................185
CONFIG2H (Configuration 2 High) ..........................187
CONFIG2L (Configuration 2 Low) ............................186
CONFIG3H (Configuration 3 High) ..........................189
CONFIG3L (Configuration 3 Low) ............................188
CONFIG4L (Configuration 4 Low) ............................190
CONFIG5H (Configuration 5 High) ..........................191
CONFIG5L (Configuration 5 Low) ............................191
CONFIG6H (Configuration 6 High) ..........................192
CONFIG6L (Configuration 6 Low) ............................192
CONFIG7H (Configuration 7 High) ..........................193
CONFIG7L (Configuration 7 Low) ............................193
CVRCON (Comparator Voltage
Reference Control) ...........................................178
DEVID1 (Device ID 1) ..............................................194
DEVID2 (Device ID 2) ..............................................194
DTCON (Dead-Time Control) ..................................130
EECON1 (EEPROM Control 1) ........................... 67, 76
FLTCONFIG (Fault Configuration) ........................... 137
INTCON (Interrupt Control) ........................................ 89
INTCON2 (Interrupt Control 2) ................................... 90
INTCON3 (Interrupt Control 3) ................................... 91
IPR1 (Peripheral Interrupt Priority 1) ......................... 96
IPR2 (Peripheral Interrupt Priority 2) ......................... 97
IPR3 (Peripheral Interrupt Priority 3) ......................... 97
LVDCON (Low-Voltage Detect Control) .................. 180
OSCCON (Oscillator Control) .................................... 22
OSCTUNE (Oscillator Tuning) ................................... 19
OVDCOND (Output Override Control) ..................... 134
OVDCONS (Output State) ....................................... 134
PIE1 (Peripheral Interrupt Enable 1) .......................... 94
PIE2 (Peripheral Interrupt Enable 2) .......................... 95
PIE3 (Peripheral Interrupt Enable 3) .......................... 95
PIR1 (Peripheral Interrupt Request (Flag) 1) ............. 92
PIR2 (Peripheral Interrupt Request (Flag) 2) ............. 93
PIR3 (Peripheral Interrupt Request (Flag) 3) ............. 93
PTCON0 (PWM Timer Control 0) ............................ 116
PTCON1 (PWM Timer Control 1) ............................ 116
PWMCON0 (PWM Control 0) .................................. 117
PWMCON1 (PWM Control 1) .................................. 118
RCON (Reset Control) ......................................... 34, 98
RCSTA (Receive Status and Control) ..................... 143
STATUS .................................................................... 58
STKPTR (Stack Pointer) ............................................ 47
T0CON (Timer0 Control) ......................................... 101
T1CON (Timer1 Control) ......................................... 105
TXSTA (Transmit Status and Control) ..................... 142
WDTCON (Watchdog Timer Control) ...................... 196
RESET ............................................................................. 238
Reset State of Registers .................................................... 40
Resets ........................................................................ 33, 184
Brown-out Reset (BOR) ........................................... 184
Oscillator Start-up Timer (OST) ............................... 184
Power-on Reset (POR) ............................................ 184
Power-up Timer (PWRT) ......................................... 184
RETFIE ............................................................................ 239
RETLW ............................................................................ 239
RETURN .......................................................................... 240
Return Address Stack ........................................................ 46
Associated Registers ................................................. 46
Return Stack Pointer (STKPTR) ........................................ 47
Revision History ............................................................... 296
RLCF ............................................................................... 240
RLNCF ............................................................................. 241
RRCF ............................................................................... 241
RRNCF ............................................................................ 242
S
SEC_IDLE Mode ............................................................... 30
SEC_RUN Mode ................................................................ 26
SETF ................................................................................ 242
Single-Supply ICSP Programming ................................... 203
SLEEP ............................................................................. 243
Sleep
OSC1 and OSC2 Pin States ...................................... 23
Software Simulator (MPLAB SIM) ................................... 205
Special Features of the CPU ........................................... 184
Special Function Registers
Map ............................................................................ 54
Stack Full/Underflow Resets .............................................. 48
SUBFSR .......................................................................... 254