參數(shù)資料
型號(hào): PIC16LF84A
廠商: Microchip Technology Inc.
英文描述: 18-pin Enhanced Flash/EEPROM 8-Bit Microcontroller
中文描述: 18引腳增強(qiáng)型閃存/ EEPROM的8位微控制器
文件頁數(shù): 15/68頁
文件大?。?/td> 494K
代理商: PIC16LF84A
PIC16F84A
1998 Microchip Technology Inc.
Preliminary
DS35007A-page 15
3.2
PORTB and TRISB Registers
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (=1) will make the corresponding PORTB pin
an input, i.e., put the corresponding output driver in a
hi-impedance mode. Clearing a TRISB bit (=0) will
make the corresponding PORTB pin an output, i.e., put
the contents of the output latch on the selected pin.
EXAMPLE 3-1:
BCF STATUS, RP0 ;
CLRF PORTB ; Initialize PORTB by
; clearing output
; data latches
BSF STATUS, RP0 ; Select Bank 1
MOVLW 0xCF ; Value used to
; initialize data
; direction
MOVWF TRISB ; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION<7>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on a
Power-on Reset.
INITIALIZING PORTB
FIGURE 3-3:
BLOCK DIAGRAM OF PINS
RB7:RB4
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
Any read or write of PORTB. This will end the
mismatch condition.
b)
Clear flag bit RBIF.
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 3-4:
BLOCK DIAGRAM OF PINS
RB3:RB0
RBPU
(1)
Data Latch
From other
RB7:RB4 pins
P
V
DD
Q
D
CK
Q
D
CK
Q
D
EN
Q
D
EN
Data bus
WR Port
WR TRIS
Set RBIF
TRIS Latch
RD TRIS
RD Port
weak
pull-up
RD Port
Latch
TTL
Input
Buffer
Note
1: TRISB = '1' enables weak pull-up
(if RBPU = '0' in the OPTION_REG register).
2: I/O pins have diode protection to V
DD
and V
SS
.
I/O
pin
(2)
RBPU
(1)
I/O
pin
(2)
Data Latch
D
P
V
DD
Q
CK
Q
D
CK
Q
D
EN
Data bus
WR Port
WR TRIS
RD TRIS
RD Port
weak
pull-up
RD Port
RB0/INT
TTL
Input
Buffer
Schmitt Trigger
Buffer
TRIS Latch
Note
1: TRISB = '1' enables weak pull-up
(if RBPU = '0' in the OPTION_REG register).
2: I/O pins have diode protection to V
DD
and V
SS
.
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