參數(shù)資料
型號(hào): PIC16F628A
廠商: Microchip Technology Inc.
英文描述: 18-pin Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology(18引腳,基于FLASH的8位CMOS微控制器,使用毫微瓦特技術(shù))
中文描述: 18引腳基于閃存的8位CMOS微控制器與納瓦技術(shù)(18引腳,基于閃存的8位的CMOS微控制器,使用毫微瓦特技術(shù))
文件頁數(shù): 54/168頁
文件大?。?/td> 2756K
代理商: PIC16F628A
PIC16F627A/628A/648A
DS40044B-page 52
Preliminary
2004 Microchip Technology Inc.
8.0
TIMER2 MODULE
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
Reset.
The input clock (F
OSC
/4) has a prescale option of 1:1,
1:4
or
1:16,
selected
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register PR2.
The TMR2 register value increments from 00h until it
matches the PR2 register value and then resets to 00h
on the next increment cycle. The PR2 register is a
readable and writable register. The PR2 register is
initialized to FFh upon Reset.
The match output of Timer2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a Timer2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 control register.
by
control
bits
8.1
Timer2 Prescaler and Postscaler
The prescaler and postscaler counters are cleared
when any of the following occurs:
a write to the TMR2 register
a write to the T2CON register
any device Reset (Power-on Reset, MCLR Reset,
Watchdog Timer Reset, or Brown-out Reset)
The TMR2 register is not cleared when T2CON is
written.
8.2
TMR2 Output
The TMR2 output (before the postscaler) is fed to the
Synchronous Serial Port module which optionally uses
it to generate shift clock.
FIGURE 8-1:
TIMER2 BLOCK DIAGRAM
Comparator
TMR2
output
Sets flag
bit TMR2IF
TMR2 reg
Reset
Postscaler
1:1
to
Prescaler
1:1, 1:4, 1:16
PR2 reg
2
F
OSC
/4
1:16
EQ
4
T2CKPS<1:0>
TOUTPS<3:0>
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