參數(shù)資料
型號: PIC14000-04
廠商: Microchip Technology Inc.
英文描述: 28-Pin Programmable Mixed Signal Controller
中文描述: 28引腳可編程混合信號控制器
文件頁數(shù): 23/152頁
文件大?。?/td> 953K
代理商: PIC14000-04
1996 Microchip Technology Inc.
Preliminary
DS40122B-page 23
PIC14000
4.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low
byte, PCL, is a readable and writable register. The high
byte of the PC (PCH) is not directly readable or
writable. PCLATH is a holding register for PC<12:8>
where contents are transferred to the upper byte of the
program counter. When PC is loaded with a new value
during a
CALL, GOTO
or a write to PCL, the high bits of
PC are loaded from PCLATH as shown in Figure 4-9.
FIGURE 4-9:
LOADING OF PC IN
DIFFERENT SITUATIONS
4.3.1
COMPUTED GOTO
When doing a table read using a computed GOTO
method, care should be exercised if the table location
crosses a PCL memory boundary (each 256 byte
block). Refer to the application note “Table Read Using
the PIC16CXX”(AN556).
4.3.2
STACK
The PIC14000 has an 8 deep x 13-bit wide hardware
stack (Figure 4-1). The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed in the stack
when a
CALL
instruction is executed or an interrupt is
acknowledged. The stack is POPed in the event of a
RETURN, RETLW
or a
RETFIE
instruction execution.
PCLATH is not affected by a “PUSH” or a “POP”
operation.
The stack operates as a circular buffer. This means
that after the stack has been “PUSHed” eight times, the
ninth push overwrites the value that was stored from
the first push. The tenth push overwrites the second
push (and so on).
Note:
On POR, the contents of the PCLATH
register are unknown. The PCLATH should
be initialized before a CALL, GOTO, or any
instruction that modifies the PCL register is
executed.
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
INST with PCL
as dest
ALU result
GOTO, CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
8
7
2
PCLATH
PCH
PCL
4.3.3
PROGRAM MEMORY PAGING
The PIC14000 has 4K of program memory, but the
CALL
and
GOTO
instructions only have a 11-bit address
range. This 11-bit address range allows a branch within
a 2K program memory page size. To allow
CALL
and
GOTO
instructions to address the entire 4K program
memory address range, there must be another bit to
specify the program memory page. This paging bit
comes from the PCLATH<3> bit (Figure 4-9). When
doing a
CALL
or
GOTO
instruction, the user must ensure
that this page bit (PCLATH<3>) is programmed to the
desired program memory page. If a
CALL
instruction (or
interrupt) is executed, the entire 13-bit PC is pushed
onto the stack. Therefore, manipulation of the
PCLATH<3> is not required for the return instructions
(which pops the PC from the stack).
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that the PCLATH is saved and restored by the interrupt
service routine (if interrupts are used).
EXAMPLE 4-1:
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
Note 1:
There are no STATUS bits to indicate
stack
overflow
conditions.
Note 2:
There are no instruction mnemonics
called PUSH nor POP. These are actions
that occur from the execution of the
CALL,
RETURN, RETLW,
or
RETFIE
instructions,
or the vectoring to an interrupt address
or
stack
underflow
Note:
The PIC14000 ignores the PCLATH<4>
bit, which is used for program memory
pages 2 and 3 (1000h-1FFFh). The use of
PCLATH<4> as a general purpose
read/write bit is not recommended since
this may affect upward compatibility with
future products.
ORG 0X500
BSF
CALL
PCLATH, 3 ; Select page 1 (800h-FFFh)
SUB1_P1
; Call subroutine in
:
; page 1 (800h-FFFh)
:
:
ORG 0X900
SUB1 P1 :
; called subroutine
:
; page 1 (800h-FFFh)
:
RETURN
; return to page 0
; (000h-7FFh)
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