參數(shù)資料
型號: PIC14000-04
廠商: Microchip Technology Inc.
英文描述: 28-Pin Programmable Mixed Signal Controller
中文描述: 28引腳可編程混合信號控制器
文件頁數(shù): 15/152頁
文件大小: 953K
代理商: PIC14000-04
1996 Microchip Technology Inc.
Preliminary
DS40122B-page 15
PIC14000
4.2.2
SPECIAL FUNCTION REGISTERS
The special function registers are registers used by the
CPU and peripheral functions for controlling the
desired operation of the device (Table 4-3). These reg-
isters are static RAM.
The special registers are classified into two sets.
Special registers associated with the “core” functions
are described in this section. Those registers related to
the operation of the peripheral features are described
in the section specific to that peripheral.
TABLE 4-3:
SPECIAL FUNCTION REGISTERS FOR THE PIC14000
Address
Bank0
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
00h*
INDF
(Indirect
Address)
TMR0
PCL
STATUS
FSR
PORTA
Reserved
PORTC
PORTD
Reserved
PCLATH
INTCON
PIR1
Reserved
ADTMRL
ADTMRH
Reserved
Reserved
Reserved
I
CBUF
I
CCON
ADCAPL
ADCAPH
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
ADCON0
Addressing this location uses contents of the FSR to address data memory (not a physical
register).
01h
02h*
03h*
04h*
05h
06h
07h
08h
09h
0Ah*
0Bh*
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Timer0 data
Program Counter’s (PC’s) least significant byte
IRP
RP1
Indirect data memory address pointer
PORTA data latch.
Reserved for emulation.
PORTC data latch
PORTD data latch
RP0
TO
PD
Z
DC
C
Buffered register for the upper 5 bits of the Program Counter (PC)
GIE
PEIE
T0IE
CMIF
r
r
CIF
T0IF
RCIF
r
r
PBIF
I
2
ADCIF
OVFIF
A/D capture timer data least significant byte
A/D capture timer data most significant byte
2
I
2
C Serial Port Receive Buffer/Transmit Register
WCOL
I
COV
I
A/D capture latch least significant byte
A/D capture latch most significant byte
2
2
2
CEN
CKP
I
2
CM3
I
2
CM2
I
2
CM1
I
2
CM0
ADCS3
ADCS2
ADCS1
ADCS0
AMUXOE
ADRST
ADZERO
Legend
— = unimplemented bits, read as ‘0’ but cannot be overwritten
r = reserved bits, default is POR value and
Reserved indicates reserved register and
* indicates registers that can be addressed from either bank
should not be overwritten with any value
should not be overwritten with any value
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