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參數(shù)資料
| 型號(hào)： | PI7C8154BNAE |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 99/114頁(yè) |
| 文件大小： | 0K |
| 描述： | IC PCI-PCI BRIDGE ASYNC 304-PBGA |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 304-BBGA |
| 供應(yīng)商設(shè)備封裝： | 304-PBGA（31x31） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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PI7C8154B
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 85 of 114
JUNE 2008 REVISION 1.1
Bit
Function
Type
Description
19
VGA enable
R/W
Controls the bridge’s response to VGA compatible addresses.
0: does not forward VGA compatible memory and I/O addresses from
primary to secondary
1: forward VGA compatible memory and I/O addresses from primary to
secondary regardless of other settings
Reset to 0
20
Reserved
R/O
Reserved. Returns 0 when read. Reset to 0
21
Master Abort
Mode
R/W
Control’s bridge’s behavior responding to master aborts on secondary
interface.
0: does not report master aborts (returns FFFF_FFFFh on reads and
discards data on writes)
1: reports master aborts by signaling target abort if possible or by the
assertion of P_SERR# if enabled
Reset to 0
22
Secondary
Interface Reset
R/W
Controls the assertion of S_RESET# signal pin on the secondary interface
0: does not force the assertion of S_RESET# pin
1: forces the assertion of S_RESET#
Reset to 0
23
Fast Back-to-
Back Enable
R/W
Controls bridge’s ability to generate fast back-to-back transactions on the
secondary interface.
0: does not allow fast back-to-back transactions on the secondary
1: enables fast back-to-back transactions on the secondary
Reset to 0
24
Primary Master
Timeout
R/W
Determines the maximum number of PCI clock cycles the bridge waits
for an initiator on the primary interface to repeat a delayed transaction
request.
0: Primary discard timer counts 215 PCI clock cycles.
1: Primary discard timer counts 210 PCI clock cycles.
Reset to 0
25
Secondary
Master Timeout
R/W
Determines the maximum number of PCI clock cycles the bridge waits
for an initiator on the primary interface to repeat a delayed transaction
request.
0: Primary discard timer counts 215 PCI clock cycles.
1: Primary discard timer counts 210 PCI clock cycles.
Reset to 0
26
Master Timeout
Status
R/WC
This bit is set to 1 when either the primary master timeout counter or
secondary master timeout counter expires.
Reset to 0
27
Discard Timer
P_SERR# enable
R/W
This bit is set to 1 and P_SERR# is asserted when either the primary
discard timer or the secondary discard timer expire.
0: P_SERR# is not asserted on the primary interface as a result of the
expiration of either the Primary Discard Timer or the Secondary Discard
Timer.
1: P_SERR# is asserted on the primary interface as a result of the
expiration of either the Primary Discard Timer or the Secondary Discard
Timer.
Reset to 0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8154BNAE-80 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154BNAI | 制造商:Pericom Semiconductor Corporation 功能描述: |
| PI7C8154BNAIE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154EVB | 功能描述:界面開發(fā)工具 64B/66MHz 2 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8154NA-33 | 制造商:PERICOM 功能描述: |
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