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參數(shù)資料
| 型號： | PI7C8154 |
| 英文描述： | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| 中文描述： | PCI橋| 2端口PCI至PCI橋 |
| 文件頁數(shù)： | 91/115頁 |
| 文件大?。?/td> | 879K |
| 代理商： | PI7C8154 |
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PI7C8150B
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 91 of 115
July 31, 2003 – Revision 1.031
Bit
4
Function
Secondary Bus
Prefetch Disable
Type
R/W
Description
Controls the bridge’s ability to prefetch during upstream memory
read transactions.
0: The bridge prefetches and does not forward byte enable bits during
upstream memory reads.
1: The bridge requests only 1 DWORD from the target and forwards
read byte enable bits during upstream memory reads.
Reset to 0
Enables hardware control of transaction forwarding.
0: GPIO[3] has no effect on the I/O, memory, and master enable bits
1: If GPIO[3] is set to input mode, this bit enables GPIO[3] to mask
I/O enable, memory enable and master enable bits to 0. PI7C8150B
will stop accepting I/O and memory transactions as a result.
Reset to 0
Reserved. Returns 0 when read. Reset to 0
Controls the chip and secondary bus reset.
0: PI7C8150B is ready for operation
1: Causes PI7C8150B to perform a chip reset
Controls the testability of the bridge’s internal counters.
The bits are used for chip test only.
00: all bits are exercised
01: byte 1 is exercised
10: byte 2 is exercised
11: byte 3 is exercised
Reset to 0
Reserved. Returns 0 when read. Reset to 0.
5
Live Insertion
Mode
R/W
7:6
8
Reserved
Chip Reset
R/O
R/WR
10:9
Test Mode For
All Counters at P
and S1
R/O
15:11
Reserved
R/O
14.1.30
ARBITER CONTROL REGISTER – OFFSET 40h
Bit
24:16
Function
Arbiter Control
Type
R/W
Description
Each bit controls whether a secondary bus master is assigned to the
high priority group or the low priority group.
Bits [24:16] correspond to request inputs S_REQ_L[8:0]
respectively.
Bit 24 corresponds to S_REQ_L[8]
Bit 16 corresponds to S_REQ_L[0]
0: low priority
1: high priority
Reset to 0
Controls whether the secondary interface of the bridge is in the high
priority group or the low priority group.
0: low priority
1: high priority
Reset to 1
Reserved. Returns 0 when read. Reset to 0.
25
Priority of
Secondary
Interface
R/W
31:26
Reserved
R/O
相關PDF資料 |
PDF描述 |
|---|---|
| PI7C8154-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150A | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150A-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8154-33 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8154ANA | 功能描述:外圍驅(qū)動器與原件 - PCI 64-Bit/66MHz 2-Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154ANAE | 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154ANAE-33 | 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154B | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE |
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