- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368020 > PI7C8150B-33 PCI Bridge | Asynchronous 2-Port PCI Bridge PDF資料下載
參數(shù)資料
| 型號(hào)： | PI7C8150B-33 |
| 英文描述： | PCI Bridge | Asynchronous 2-Port PCI Bridge |
| 中文描述： | PCI橋|異步2端口PCI橋 |
| 文件頁數(shù)： | 78/115頁 |
| 文件大?。?/td> | 879K |
| 代理商： | PI7C8150B-33 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁當(dāng)前第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁
PI7C8150B
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 78 of 115
July 31, 2003 – Revision 1.031
are driven low for the duration of S_RESET_L assertion. All posted write and delayed
transaction data buffers are reset. Therefore, any transactions residing inside the buffers at
the time of secondary reset are discarded.
When S_RESET_L is asserted by means of the secondary reset bit, PI7C8150B remains
accessible during secondary interface reset and continues to respond to accesses to its
configuration space from the primary interface.
12.3
CHIP RESET
The chip reset bit in the diagnostic control register can be used to reset the PI7C8150B and
the secondary bus.
When the chip reset bit is set, all registers and chip state are reset and all signals are
tristated. S_RESET_L is asserted and the secondary reset bit is automatically set.
S_RESET_L remains asserted until a configuration write operation clears the secondary
reset bit and the serial clock mask has been shifted in. Within 20 PCI clock cycles after
completion of the configuration write operation, PI7C8150B’s reset bit automatically clears
and PI7C8150B is ready for configuration.
During reset, PI7C8150B is inaccessible.
13
SUPPORTED COMMANDS
The PCI command set is given below for the primary and secondary interfaces.
13.1
PRIMARY INTERFACE
P_CBE [3:0]
0000
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
Action
Ignore
0001
0010
Do not claim. Ignore.
1. If address is within pass through I/O range, claim and pass
through.
2. Otherwise, do not pass through and do not claim for
internal access.
Same as I/O Read.
-----
-----
1. If address is within pass through memory range, claim and
pass through.
2. If address is within pass through memory mapped I/O
range, claim and pass through.
3. Otherwise, do not pass through and do not claim for
internal access.
Same as Memory Read.
-----
-----
0011
0100
0101
0110
I/O Write
Reserved
Reserved
Memory Read
0111
1000
1001
Memory Write
Reserved
Reserved
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI7C8152B | PCI Bridge | Asynchronous 2-Port PCI Bridge |
| PI7C8154 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8154-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
| PI7C8150-33 | PCI Bridge | 2-Port PCI-to-PCI Bridge |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8150BEVB | 功能描述:界面開發(fā)工具 2 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8150BMA | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE |
| PI7C8150BMA-33 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE |
| PI7C8150BMAE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 32-Bit PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8150BMAI | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。