參數(shù)資料
型號(hào): PH28F128W18BD60A
廠商: INTEL CORP
元件分類: PROM
英文描述: 8M X 16 FLASH 1.8V PROM, 60 ns, PBGA56
封裝: 9 X 11 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-56
文件頁數(shù): 2/106頁
文件大小: 1496K
代理商: PH28F128W18BD60A
Intel
Wireless Flash Memory (W18)
07-Dec-2005
Intel Wireless Flash Memory (W18)
Datasheet
10
Order Number: 290701, Revision: 015
Throughout this document, references are made to top, bottom, parameter, and partition. To clarify
these references, the following conventions have been adopted:
Word
2 bytes or 16 bits.
Signal
Voltage
Applied to the signal is subscripted for example VPP.
Block
A group of bits (or words) that erase simultaneously with one block erase instruction.
Main block
Contains 32-Kwords.
Parameter
block
Contains 4-Kwords.
Block Base
Address (BBA)
The first address of a block.
Partition
A group of blocks that share erase and program circuitry and a common Status Register.
Partition Base
Address (PBA)
The first address of a partition. For example, on a 32-Mbit top-parameter device partition
number 5 has a PBA of 0x140000.
Top partition
Located at the highest physical device address. This partition may be a main partition or a
parameter partition.
Bottom
partition
Located at the lowest physical device address. This partition may be a main partition or a
parameter partition.
Main partition
Contains only main blocks.
Parameter
partition
Contains a mixture of main blocks and parameter blocks.
Top parameter
device (TPD)
Has the parameter partition at the top of the memory map with the parameter blocks at
the top of that partition. This was formerly referred to as a Top-Boot device.
Bottom
parameter
device (BPD)
Has the parameter partition at the bottom of the memory map with the parameter blocks
at the bottom of that partition. This was formerly referred to as a Bottom-Boot Block flash
device.
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