參數(shù)資料
型號(hào)： PHD12NQ15T
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： JFETs
英文描述： N-channel TrenchMOS transistor
中文描述： 12.5 A, 150 V, 0.2 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁(yè)數(shù)： 1/12頁(yè)
文件大小： 114K
代理商： PHD12NQ15T
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHP12NQ15T, PHB12NQ15T
PHD12NQ15T
FEATURES
SYMBOL
QUICK REFERENCE DATA
’Trench’ technology
Low on-state resistance
V
DSS = 150 V
Fast switching
Low thermal resistance
I
D = 12.5 A
R
DS(ON) ≤ 200 m
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using ’trench’ technology. The device
has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications.
The PHP12NQ15T is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB12NQ15T is supplied in the SOT404 (D
2PAK) surface mounting package.
The PHD12NQ15T is supplied in the SOT428 (DPAK) surface mounting package.
PINNING
SOT78 (TO220AB)
SOT404 (D
2PAK)
SOT428 (DPAK)
PIN
DESCRIPTION
1
gate
2
drain
1
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j = 25 C to 175C
-
150
V
DGR
Drain-gate voltage
T
j = 25 C to 175C; RGS = 20 k
-
150
V
GS
Gate-source voltage
-
± 20
V
I
D
Continuous drain current
T
mb =
25 C; V
GS = 10 V
-
12.5
A
T
mb = 100 C; VGS = 10 V
-
8.8
A
I
DM
Pulsed drain current
T
mb = 25 C
-
50
A
P
D
Total power dissipation
T
mb = 25 C
-
88
W
T
j, Tstg
Operating junction and
- 55
175
C
storage temperature
d
g
s
12 3
tab
13
tab
2
1
2
3
tab
1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.
August 1999
1
Rev 1.000
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