參數(shù)資料
型號(hào)： PHD12NQ15T
廠商： NXP SEMICONDUCTORS
元件分類： JFETs
英文描述： N-channel TrenchMOS transistor
中文描述： 12.5 A, 150 V, 0.2 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁數(shù)： 5/12頁
文件大?。?/td> 114K
代理商： PHD12NQ15T
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHP12NQ15T, PHB12NQ15T
PHD12NQ15T
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
E
AS
Non-repetitive avalanche
Unclamped inductive load, I
AS = 9.5 A;
-
93
mJ
energy
t
p = 100 s; Tj prior to avalanche = 25C;
V
DD ≤ 25 V; RGS = 50 ; VGS = 10 V; refer
to fig:15
I
AS
Peak non-repetitive
-
12.5
A
avalanche current
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction
-
1.7
K/W
to mounting base
R
th j-a
Thermal resistance junction
SOT78 package, in free air
-
60
-
K/W
to ambient
SOT404 & SOT428 packages, pcb
-
50
-
K/W
mounted, minimum footprint
ELECTRICAL CHARACTERISTICS
T
j= 25C
unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown
V
GS = 0 V; ID = 0.25 mA;
150
-
V
voltage
T
j = -55C
133
-
V
GS(TO)
Gate threshold voltage
V
DS = VGS; ID = 1 mA
2
3
4
V
T
j = 175C
1
-
V
T
j = -55C
-
6
V
R
DS(ON)
Drain-source on-state
V
GS = 10 V; ID = 6 A
-
180
200
m
resistance
T
j = 175C
-
560
m
I
GSS
Gate source leakage current V
GS = ± 10 V; VDS = 0 V
-
10
100
nA
I
DSS
Zero gate voltage drain
V
DS = 150 V; VGS = 0 V
-
0.05
10
A
current
T
j = 175C
-
500
A
Q
g(tot)
Total gate charge
I
D = 12 A; VDD = 120 V; VGS = 10 V
-
20
-
nC
Q
gs
Gate-source charge
-
4.4
-
nC
Q
gd
Gate-drain (Miller) charge
-
8
-
nC
t
d on
Turn-on delay time
V
DD = 75 V; RD = 6.8 ;-
8
-
ns
t
r
Turn-on rise time
V
GS = 10 V; RG = 5.6
-20
-
ns
t
d off
Turn-off delay time
Resistive load
-
20
-
ns
t
f
Turn-off fall time
-
12
-
ns
L
d
Internal drain inductance
Measured tab to centre of die
-
3.5
-
nH
L
d
Internal drain inductance
Measured from drain lead to centre of die
-
4.5
-
nH
(SOT78 package only)
L
s
Internal source inductance
Measured from source lead to source
-
7.5
-
nH
bond pad
C
iss
Input capacitance
V
GS = 0 V; VDS = 25 V; f = 1 MHz
-
860
-
pF
C
oss
Output capacitance
-
108
-
pF
C
rss
Feedback capacitance
-
57
-
pF
August 1999
2
Rev 1.000
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